Product details


Technology Family HC Function Decoder, Demultiplexer Configuration 4:7 Channels (#) 1 VCC (Min) (V) 2 VCC (Max) (V) 6 Input type LVTTL/CMOS Output type CMOS open-in-new Find other Encoders & decoders

Package | Pins | Size

PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6 TSSOP (PW) 16 22 mm² 4.4 x 5 open-in-new Find other Encoders & decoders


  • 2-V to 6-V VCC Operation (’HC4511)
  • 4.5-V to 5.5-V VCC Operation (CD74HCT4511)
  • High-Output Sourcing Capability
    • 7.5 mA at 4.5 V (CD74HCT4511)
    • 10 mA at 6 V (’HC4511)
  • Input Latches for BCD Code Storage
  • Lamp Test and Blanking Capability
  • Balanced Propagation Delays and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • ’HC4511
    • High Noise Immunity, NIL or NIH = 30% of VCC at VCC = 5 V
  • CD74HCT4511
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8 V Maximum, VIH = 2 V Minimum
    • CMOS Input Compatibility, II 1 µA at VOL, VOH
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The CD54HC4511, CD74HC4511, and CD74HCT4511 are BCD-to-7 segment latch/decoder/drivers with four address inputs (D0–D3), an active-low blanking (BL)\ input, lamp-test (LT)\ input, and a latch-enable (LE)\ input that, when high, enables the latches to store the BCD inputs. When LE\ is low, the latches are disabled, making the outputs transparent to the BCD inputs.

These devices have standard-size output transistors, but are capable of sourcing (at standard VOH levels) up to 7.5 mA at 4.5 V. The HC types can supply up to 10 mA at 6 V.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 15
Type Title Date
* Datasheet CD54HC4511, CD74HC4511, CD74HCT4511 datasheet (Rev. D) Oct. 07, 2003
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guides Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application notes Designing With Logic (Rev. C) Jun. 01, 1997
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
Application notes SN54/74HCT CMOS Logic Family Applications and Restrictions May 01, 1996
Application notes Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc Apr. 01, 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

Reference designs

Inductive Sensing 32-Position Encoder Knob Reference Design using the LDC1312/LDC1314
TIDA-00615 An inductive sensing based incremental encoder knob design can provide a robust and low-cost interface for control inputs.  It can reliably operate in environments which have dirt, moisture, or oil which would pose issues for alternate sensing technologies. This solution requires no magnets.
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
PDIP (N) 16 View options
SOIC (D) 16 View options
TSSOP (PW) 16 View options

Ordering & quality

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