CD74HCT4511 High Speed CMOS Logic BCD-to-7 Segment Latch/Decoder/Driver |

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High Speed CMOS Logic BCD-to-7 Segment Latch/Decoder/Driver

High Speed CMOS Logic BCD-to-7 Segment Latch/Decoder/Driver - CD74HCT4511


The CD54HC4511, CD74HC4511, and CD74HCT4511 are BCD-to-7 segment latch/decoder/drivers with four address inputs (D0–D3), an active-low blanking (BL)\ input, lamp-test (LT)\ input, and a latch-enable (LE)\ input that, when high, enables the latches to store the BCD inputs. When LE\ is low, the latches are disabled, making the outputs transparent to the BCD inputs.

These devices have standard-size output transistors, but are capable of sourcing (at standard VOH levels) up to 7.5 mA at 4.5 V. The HC types can supply up to 10 mA at 6 V.


  • 2-V to 6-V VCC Operation (’HC4511)
  • 4.5-V to 5.5-V VCC Operation (CD74HCT4511)
  • High-Output Sourcing Capability
    • 7.5 mA at 4.5 V (CD74HCT4511)
    • 10 mA at 6 V (’HC4511)
  • Input Latches for BCD Code Storage
  • Lamp Test and Blanking Capability
  • Balanced Propagation Delays and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • ’HC4511
    • High Noise Immunity, NIL or NIH = 30% of VCC at VCC = 5 V
  • CD74HCT4511
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8 V Maximum, VIH = 2 V Minimum
    • CMOS Input Compatibility, II 1 µA at VOL, VOH


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Part number Order Function Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) Voltage (Nom) (V) F @ nom voltage (Max) (MHz) ICC @ nom voltage (Max) (mA) tpd @ nom Voltage (Max) (ns) Configuration Type IOL (Max) (mA) IOH (Max) (mA) Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Bits (#) Digital input leakage (Max) (uA) ESD CDM (kV) ESD HBM (kV)
CD74HCT4511 Order now Decoder
HCT     4.5     5.5     1     5     25     0.08     25     4:7     Standard     4     -4     Catalog     -55 to 125     PDIP | 16     16PDIP: 181 mm2: 9.4 x 19.3 (PDIP | 16)     7     5     0.75     2