JAJSJH4D データシート

JAJSJH4D december 2010 – september 2020 BQ24133

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RGY|24
- MPQF143E

サーマルパッド・メカニカル・データ

RGY|24
- QFND258I

発注情報

8.5 Electrical Characteristics

4.5 V ≤ V(PVCC, AVCC) ≤ 17 V, –40°C < T_J + 125°C, typical values are at T_A = 25°C, with respect to AGND (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
OPERATING CONDITIONS
V_{AVCC_OP}	AVCC input voltage operating range during charging		4.5		17	V
QUIESCENT CURRENTS
I_BAT	Battery discharge current (sum of currents into AVCC, PVCC, ACP, ACN)	V_AVCC > V_UVLO, V_SRN > V_AVCC (SLEEP), T_J = 0°C to 85°C			15	µA
		BTST, SW, SRP, SRN, V_AVCC > V_UVLO, V_AVCC > V_SRN, ISET < 40 mV, V_BAT=12.6 V, Charge disabled			25
		BTST, SW, SRP, SRN, V_AVCC > V_UVLO, V_AVCC > V_SRN, ISET > 120 mV, V_BAT=12.6 V, Charge done			25
I_AC	Adapter supply current (sum of current into AVCC,ACP, ACN)	V_AVCC > V_UVLO, V_AVCC > V_SRN, ISET < 40 mV, V_BAT=12.6 V, Charge disabled		1.2	1.5	mA
		V_AVCC > V_UVLO, V_AVCC > V_SRN, ISET > 120 mV, Charge enabled, no switching		2.5	5
		V_AVCC > V_UVLO, V_AVCC > V_SRN, ISET > 120 mV, Charge enabled, switching		15⁽²⁾
CHARGE VOLTAGE REGULATION
V_{BAT_REG}	SRN regulation voltage	CELL to AGND, 1 cell, measured on SRN		4.2		V
		CELL floating, 2 cells, measured on SRN		8.4		V
		CELL to VREF, 3 cells, measured on SRN		12.6		V
	Charge voltage regulation accuracy	T_J = 0°C to 85°C	–0.5%		0.5%
	Charge voltage regulation accuracy	T_J = –40°C to 125°C	-0.7%		0.7%
CURRENT REGULATION – FAST CHARGE
V_ISET	ISET Voltage Range	R_SENSE = 10 mΩ	0.12		0.5	V
K_ISET	Charge Current Set Factor (Amps of Charge Current per Volt on ISET pin)	R_SENSE = 10 mΩ		5		A/V
	Charge Current Regulation Accuracy	V_SRP-SRN = 40 mV	–5%		5%
		V_SRP-SRN = 20 mV	–8%		8%
		V_SRP-SRN = 5 mV	–25%		25%
V_{ISET_CD}	Charge Disable Threshold	ISET falling	40	50		mV
V_{ISET_CE}	Charge Enable Threshold	ISET rising		100	120	mV
I_ISET	Leakage Current into ISET	VISET = 2 V			100	nA
INPUT CURRENT REGULATION
K_DPM	Input DPM Current Set Factor (Amps of Input Current per Volt on ACSET)	R_SENSE = 20 mΩ		2.5		A/V
	Input DPM Current Regulation Accuracy	V_ACP-ACN = 80 mV	–6%		6%
		V_ACP-ACN = 40 mV	–10%		10%
		V_ACP-ACN = 20 mV	–15%		15%
		V_ACP-ACN = 5 mV	–20%		20%
I_ACSET	Leakage Current into ACSET pin	V_ACSET = 2 V			100	nA
CURRENT REGULATION – PRECHARGE
K_IPRECHG	Precharge current set factor	Percentage of fast charge current		10%⁽¹⁾
	Precharge current regulation accuracy	V_SRP-SRN = 4 mV	–25%		25%
	Precharge current regulation accuracy	V_SRP-SRN = 2 mV	–40%		40%
CHARGE TERMINATION
K_TERM	Termination current set factor	Percentage of fast charge current		10%⁽¹⁾
	Termination current regulation accuracy	V_SRP-SRN = 4 mV	–25%		25%
	Termination current regulation accuracy	V_SRP-SRN = 2 mV	–40%		40%
t_{TERM_DEG}	Deglitch time for termination (both edges)			100		ms
t_QUAL	Termination qualification time	V_SRN > V_RECH and I_CHG < I_TERM		250		ms
I_QUAL	Termination qualification current	Discharge current once termination is detected		2		mA
INPUT UNDERVOLTAGE LOCKOUT COMPARATOR (UVLO)
V_UVLO	AC undervoltage rising threshold	Measure on AVCC	3.4	3.6	3.8	V
V_{UVLO_HYS}	AC undervoltage hysteresis, falling	Measure on AVCC		300		mV
SLEEP COMPARATOR (REVERSE DISCHARGING PROTECTION)
V_SLEEP	SLEEP mode threshold	V_AVCC – V_SRN falling	50	90	150	mV
V_{SLEEP_HYS}	SLEEP mode hysteresis	V_AVCC – V_SRN rising		200		mV
t_{SLEEP_FALL_CD}	SLEEP deglitch to disable charge	V_AVCC – V_SRN falling		1		ms
t_{SLEEP_FALL_FETOFF}	SLEEP deglitch to turn off input FETs	V_AVCC – V_SRN falling		5		ms
t_{SLEEP_FALL}	Deglitch to enter SLEEP mode, disable VREF and enter low quiescent mode	V_AVCC – V_SRN falling		100		ms
t_{SLEEP_PWRUP}	Deglitch to exit SLEEP mode, and enable VREF	V_AVCC – V_SRN rising		30		ms
ACN-SRN COMPARATOR
V_ACN-SRN	Threshold to turn on BATFET	V_ACN-SRN falling	150	220	300	mV
V_{ACN-SRN_HYS}	Hysteresis to turn off BATFET	V_ACN-SRN rising		100		mV
t_{BATFETOFF_DEG}	Deglitch to turn on BATFET	V_ACN-SRN falling		2		ms
t_{BATFETON_DEG}	Deglitch to turn off BATFET	V_ACN-SRN rising		50		µs
BAT LOWV COMPARATOR
V_LOWV	Precharge to fast charge transition	CELL to AGND, 1 cell, measure on SRN	2.87	2.9	2.93	V
		CELL floating, 2 cells, measure on SRN	5.74	5.8	5.86
		CELL to VREF, 3 cells, measure on SRN	8.61	8.7	8.79
V_{LOWV_HYS}	Fast charge to precharge hysteresis	CELL to AGND, 1 cell, measure on SRN		200		mV
		CELL floating, 2 cells, measure on SRN		400
		CELL to VREF, 3 cells, measure on SRN		600
t_pre2fas	V_LOWV rising deglitch	Delay to start fast charge current		25		ms
t_fast2pre	V_LOWV falling deglitch	Delay to start precharge current		25		ms
RECHARGE COMPARATOR
V_RECHG	Recharge Threshold, below regulation voltage limit, V_{BAT_REG}-V_SRN	CELL to AGND, 1 cell, measure on SRN	70	100	130	mV
		CELL floating, 2 cells, measure on SRN	140	200	260
		CELL to VREF, 3 cells, measure on SRN	210	300	390
t_{RECH_RISE_DEG}	V_RECHG rising deglitch	SRN decreasing below V_RECHG		10		ms
t_{RECH_FALL_DEG}	V_RECHG falling deglitch	SRN increasing above V_RECHG		10		ms
BAT OVERVOLTAGE COMPARATOR
V_{OV_RISE}	Overvoltage rising threshold	As percentage of V_{BAT_REG}		104%
V_{OV_FALL}	Overvoltage falling threshold	As percentage of V_SRN		102%
INPUT OVERVOLTAGE COMPARATOR (ACOV)
V_ACOV	AC Overvoltage Rising Threshold to turn off ACFET	OVPSET rising	1.55	1.6	1.65	V
V_{ACOV_HYS}	AC overvoltage falling hysteresis	OVPSET falling		50		mV
t_{ACOV_RISE_DEG}	AC Overvoltage Rising Deglitch to turn off ACFET and Disable Charge	OVPSET rising		1		µs
t_{ACOV_FALL_DEG}	AC Overvoltage Falling Deglitch to turn on ACFET	OVPSET falling		30		ms
INPUT UNDERVOLTAGE COMPARATOR (ACUV)
V_ACUV	AC Undervoltage Falling Threshold to turn off ACFET	OVPSET falling	0.45	0.5	0.55	V
V_{ACUV_HYS}	AC Undervoltage Rising Hysteresis	OVPSET rising		100		mV
t_{ACOV_FALL_DEG}	AC Undervoltage Falling Deglitch to turn off ACFET and Disable Charge	OVPSET falling		1		µs
t_{ACOV_RISE_DEG}	AC Undervoltage Rising Deglitch to turn on ACFET	OVPSET rising		30		ms
THERMAL REGULATION
T_{J_REG}	Junction Temperature Regulation Accuracy	ISET > 120 mV, Charging		120		°C
THERMAL SHUTDOWN COMPARATOR
T_SHUT	Thermal shutdown rising temperature	Temperature rising		150		°C
T_{SHUT_HYS}	Thermal shutdown hysteresis	Temperature falling		20		°C
t_{SHUT_RISE_DEG}	Thermal shutdown rising deglitch	Temperature rising		100		µs
t_{SHUT_FALL_DEG}	Thermal shutdown falling deglitch	Temperature falling		10		ms
THERMISTOR COMPARATOR
V_LTF	Cold Temperature Threshold, TS pin Voltage Rising Threshold	Charger suspends charge. As percentage to V_VREF	72.5%	73.5%	74.5%
V_{LTF_HYS}	Cold Temperature Hysteresis, TS pin Voltage Falling	As percentage to V_VREF	0.2%	0.4%	0.6%
V_HTF	Hot Temperature TS pin voltage rising Threshold	As percentage to V_VREF	46.6%	47.2%	48.8%
V_TCO	Cut-off Temperature TS pin voltage falling Threshold	As percentage to V_VREF	44.2%	44.7%	45.2%
t_{TS_CHG_SUS}	Deglitch time for Temperature Out of Range Detection	V_TS > V_LTF, or V_TS < V_TCO, or V_TS < V_HTF		20		ms
t_{TS_CHG_RESUME}	Deglitch time for Temperature in Valid Range Detection	V_TS < V_LTF – V_{LTF_HYS} or V_TS >V_TCO, or V_TS > V_HTF		400		ms
CHARGE OVERCURRENT COMPARATOR (CYCLE-BY-CYCLE)
V_{OCP_CHRG}	Charge Overcurrent Rising Threshold, V_SRP > 2.2 V	Current as percentage of fast charge current		160%
V_{OCP_MIN}	Charge Overcurrent Limit Min, V_SRP < 2.2 V	Measure V_SRP-SRN		45		mV
V_{OCP_MAX}	Charge Overcurrent Limit Max, V_SRP > 2.2 V	Measure V_SRP-SRN		75		mV
HSFET OVERCURRENT COMPARATOR (CYCLE-BY-CYCLE)
I_{OCP_HSFET}	Current limit on HSFET	Measure on HSFET	6			A
CHARGE UNDERCURRENT COMPARATOR (CYCLE-BY-CYCLE)
V_UCP	Charge undercurrent falling threshold	Measure on V_(SRP-SRN)	1	5	9	mV
BAT SHORT COMPARATOR
V_BATSHT	Battery short falling threshold	Measure on SRN		2		V
V_{BATSHT_HYS}	Battery short rising hysteresis	Measure on SRN		200		mV
t_{BATSHT_DEG}	Deglitch on both edges			1		µs
V_BATSHT	Charge Current during BATSHORT	Percentage of fast charge current		10%⁽¹⁾
VREF REGULATOR
V_{VREF_REG}	VREF regulator voltage	V_AVCC > V_UVLO, No load	3.267	3.3	3.333	V
I_{VREF_LIM}	VREF current limit	V_VREF = 0 V, V_AVCC > V_UVLO	35		90	mA
REGN REGULATOR
V_{REGN_REG}	REGN regulator voltage	V_AVCC > 10 V, ISET > 120 mV	5.7	6	6.3	V
I_{REGN_LIM}	REGN current limit	V_REGN = 0 V, V_AVCC > 10 v, ISET > 120 mV	40		120	mA
TTC INPUT
t_prechrg	Precharge Safety Timer	Precharge time before fault occurs	1620	1800	1980	s
t_fastchrg	Fast Charge Timer Range	T_chg=C_TTC*K_TTC	1		10	hr
	Fast Charge Timer Accuracy		–10%		10%
K_TTC	Timer Multiplier			5.6		min/nF
V_{TTC_LOW}	TTC Low Threshold	TTC falling			0.4	V
I_TTC	TTC Source/Sink Current		45	50	55	µA
V_{TTC_OSC_HI}	TTC oscillator high threshold			1.5		V
V_{TTC_OSC_LO}	TTC oscillator low threshold			1		V
BATTERY SWITCH (BATFET) DRIVER
R_{DS_BAT_OFF}	BATFET Turnoff Resistance	V_AVCC > 5 V			100	Ω
R_{DS_BAT_ON}	BATFET Turnon Resistance	V_AVCC > 5 V			20	kΩ
V_{BATDRV_REG}	BATFET Drive Voltage	V_{BATDRV_REG} =V_ACN - V_BATDRV when V_AVCC > 5 V and BATFET is on	4.2		7	V
t_{BATFET_DEG}	BATFET Power-up Delay to turn off BATFET after adapter is detected			30		ms
AC SWITCH (ACFET) DRIVER
I_ACFET	ACDRV Charge Pump Current Limit	V_ACDRV - V_CMSRC = 5 V		60		µA
V_{ACDRV_REG}	Gate Drive Voltage on ACFET	V_ACDRV - V_CMSRC when V_AVCC > V_UVLO	4.2	6		V
R_{ACDRV_LOAD}	Maximum load between ACDRV and CMSRC		500			kΩ
AC/BAT SWITCH DRIVER TIMING
t_{DRV_DEAD}	Driver Dead Time	Dead Time when switching between ACFET and BATFET		10		µs
BATTERY DETECTION
t_WAKE	Wake timer	Max time charge is enabled		500		ms
I_WAKE	Wake current	R_SENSE = 10 mΩ	50	125	200	mA
t_DISCHARGE	Discharge timer	Max time discharge current is applied		1		s
I_DISCHARGE	Discharge current			8		mA
I_FAULT	Fault current after a time-out fault			2		mA
V_WAKE	Wake threshold with respect to V_REG To detect battery absent during WAKE	Measure on SRN		100		mV/cell
V_DISCH	Discharge Threshold to detect battery absent during discharge	Measure on SRN		2.9		V/cell
INTERNAL PWM
fsw	PWM Switching Frequency		1360	1600	1840	kHz
t_{SW_DEAD}	Driver Dead Time⁽²⁾	Dead time when switching between LSFET and HSFET no load		30		ns
R_{DS_HI}	High-Side MOSFET ON-Resistance	V_BTST – V_SW = 4.5 V		80	150	mΩ
R_{DS_LO}	Low-Side MOSFET ON-Resistance			95	160	mΩ
V_{BTST_REFRESH}	Bootstrap Refresh Comparator Threshold Voltage	V_BTST – V_SW when low-side refresh pulse is requested, V_AVCC = 4.5 V	3			V
V_{BTST_REFRESH}	Bootstrap Refresh Comparator Threshold Voltage	V_BTST – V_SW when low-side refresh pulse is requested, V_AVCC > 6 V	4			V
INTERNAL SOFT START (8 steps to regulation current ICHG)
SS_STEP	Soft start steps			8		step
T_{SS_STEP}	Soft start step time			1.6	3	ms
CHARGER SECTION POWER-UP SEQUENCING
t_{CE_DELAY}	Delay from ISET above 120 mV to start charging battery			1.5		s
INTEGRATED BTST DIODE
V_F	Forward Bias Voltage	I_F=120 mA at 25°C		0.85		V
V_R	Reverse breakdown voltage	I_R=2 µA at 25°C			20	V
LOGIC IO PIN CHARACTERISTICS
V_{OUT_LO}	STAT Output Low Saturation Voltage	Sink Current = 5 mA			0.5	V
V_{CELL_LO}	CELL pin input low threshold, 1 cell	CELL pin voltage falling edge			0.5	V
V_{CELL_MID}	CELL pin input mid threshold, 2 cells	CELL pin voltage rising for MIN, falling for MAX	0.8		1.8	V
V_{CELL_HI}	CELL pin input high threshold, 3 cells	CELL pin voltage rising edge	2.5			V

(1) The minimum current is 120 mA on 10 mΩ sense resistor.

(2) Specified by design.