SLUSB76B February   2013  – May 2015

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Performance Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Input Voltage Protection
        1. 8.3.1.1 Input Overvoltage Protection
        2. 8.3.1.2 Bad Adaptor Detection/Rejection
        3. 8.3.1.3 Sleep Mode
        4. 8.3.1.4 Input Voltage Based DPM (Special Charger Voltage Threshold)
      2. 8.3.2  Battery Protection
        1. 8.3.2.1 Output Overvoltage Protection
        2. 8.3.2.2 Battery Short Protection
        3. 8.3.2.3 Battery Detection in HOST Mode
      3. 8.3.3  DEFAULT Mode
      4. 8.3.4  USB Friendly Power Up
      5. 8.3.5  Input Current Limiting at Power Up
      6. 8.3.6  Factory Mode
      7. 8.3.7  Spread Spectrum Mode
      8. 8.3.8  PWM Controller in Charge Mode
      9. 8.3.9  Battery Charging Process
      10. 8.3.10 Thermal Regulation and Protection
      11. 8.3.11 Charge Status Output, STAT Pin
      12. 8.3.12 Control Bits in Charge Mode
        1. 8.3.12.1 CE Bit (Charge Mode)
        2. 8.3.12.2 RESET Bit
        3. 8.3.12.3 OPA_MODE Bit
      13. 8.3.13 Control Pins in Charge Mode
        1. 8.3.13.1 CD Pin (Charge Disable)
      14. 8.3.14 Boost Mode Operation
        1. 8.3.14.1 PWM Controller in Boost Mode
        2. 8.3.14.2 Boost Start Up
        3. 8.3.14.3 PFM Mode at Light Load
        4. 8.3.14.4 Protection in Boost Mode
          1. 8.3.14.4.1 Output Overvoltage Protection
          2. 8.3.14.4.2 Output Overload Protection
          3. 8.3.14.4.3 Battery Overvoltage Protection
        5. 8.3.14.5 STAT Pin in Boost Mode
      15. 8.3.15 High Impedance (Hi-Z) Mode
      16. 8.3.16 Serial Interface Description
        1. 8.3.16.1 F/S Mode Protocol
        2. 8.3.16.2 HS Mode Protocol
        3. 8.3.16.3 I2C Update Sequence
        4. 8.3.16.4 Slave Address Byte
        5. 8.3.16.5 Register Address Byte
    4. 8.4 Device Functional Modes
      1. 8.4.1 Charge Mode Operation
        1. 8.4.1.1 Charge Profile
    5. 8.5 Register Maps
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Charge Current Sensing Resistor Selection Guidelines
        2. 9.2.2.2 Output Inductor and Capacitance Selection Guidelines
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 System Load After Sensing Resistor
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Package Summary
      1. 13.1.1 Chip Scale Packaging Dimensions

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The bq24157S is a compact, flexible, high-efficiency, USB-friendly, switch-mode charge management solution for single-cell Li-ion and Li-polymer batteries used in a wide range of portable applications. The bq24157S integrates a synchronous PWM controller, power MOSFETs, input current sensing, high-accuracy current and voltage regulation, and charge termination, into a small DSBGA package. The charge parameters can be programmed through an I2C interface.

9.2 Typical Application

VBUS = 5 V, ICHARGE = 1250 mA, VBAT = 3.5 to 4.44 V (adjustable).

bq24157S app_circuit_fig2_lusb76.gifFigure 28. I2C Controlled 1-Cell USB Charger Application Circuit With USB-OTG Support

9.2.1 Design Requirements

Use the following typical application design procedure to select external components values for the bq24157S device.

Specification Test Condition MIN TYP MAX UNIT
Input DC voltage, VIN Input voltage from AC adapter input 4 5 6 V
Input current Maximum input current from AC adapter input 0.1 0.1 to 0.5 1.5 A
Charge current Battery charge current 0.325 0.7 1.55 A
Output regulation voltage Voltage applied at VBAT 0 3 to 4.2 4.44 V
Operating junction temperature range, TJ 0 125 °C

9.2.2 Detailed Design Procedure

Systems design specifications:

  • VBUS = 5 V
  • VBAT = 4.2 V (1 cell)
  • I(charge) = 1.25 A
  • Inductor ripple current = 30% of fast charge current

  1. Determine the inductor value (LOUT) for the specified charge current ripple:
  2. bq24157S q_lo_vbat_lus824.gif, the worst case is when battery voltage is as close as to half of the input voltage.

    Equation 1. bq24157S q_lo_25_lus824.gif

    LOUT = 1.11 μH

    Select the output inductor to standard 1 μH. Calculate the total ripple current with using the 1-μH inductor:

    Equation 2. bq24157S q_dlo_vbat_lus824.gif
    Equation 3. bq24157S q_dlo_25_lus824.gif

    ΔIL = 0.42 A

    Calculate the maximum output current:

    Equation 4. bq24157S q_lpk_io_lus824.gif
    Equation 5. bq24157S q_lpk_125_lus824.gif

    ILPK = 1.46 A

    Select 2.5-mm by 2-mm, 1-μH, 1.5-A surface mount multi-layer inductor. The suggested inductor part numbers are shown in Table 11.

    Table 11. Inductor Part Numbers

    Part Number Inductance Size Manufacturer
    LQM2HPN1R0MJ0 1 μH 2.5 × 2.0 mm Murata
    MIPS2520D1R0 1 μH 2.5 × 2.0 mm FDK
    MDT2520-CN1R0M 1 μH 2.5 × 2.0 mm TOKO
    CP1008 1 μH 2.5 × 2.0 mm Inter-Technical
  3. Determine the output capacitor value (COUT) using 40 kHz as the resonant frequency:
  4. Equation 6. bq24157S q_fo_lus824.gif
    Equation 7. bq24157S q_cout_1_lus824.gif
    Equation 8. bq24157S q_cout_2_lus824.gif

    COUT = 15.8 μF

    Select two 0603 X5R 6.3-V 10-μF ceramic capacitors in parallel, that is, Murata GRM188R60J106M.

  5. Determine the sense resistor using Equation 9:
  6. Equation 9. bq24157S q_rsns_vsns_lus824.gif

    The maximum sense voltage across the sense resistor is 85 mV. To get a better current regulation accuracy, V(RSNS) should equal 85 mV, and calculate the value for the sense resistor.

    Equation 10. bq24157S q_rsns_85_lus824.gif

    R(SNS) = 68 mΩ

    This is a standard value. If it is not a standard value, then choose the next close value and calculate the real charge current. Calculate the power dissipation on the sense resistor:

    P(RSNS) = I(CHARGE)2 × R(SNS)

    P(RSNS) = 1.252 × 0.068

    P(RSNS) = 0.106 W

    Select 0402 0.125-W 68-mΩ 2% sense resistor, that is, Panasonic ERJ2BWGR068.

    For 1.5A application, R(SNS)= 85mV/1.55A = 55 mΩ

  7. Measured efficiency and total power loss with different inductors are shown in Figure 29. SW node and inductor current waveform are shown in Figure 37.
  8. bq24157S pwr_loss_lus824.gifFigure 29. Measured Efficiency and Power Loss

9.2.2.1 Charge Current Sensing Resistor Selection Guidelines

Both the termination current range and charge current range depend on the sensing resistor (RSNS). The termination current step (IOTERM_STEP) can be calculated using Equation 11.

Equation 11. bq24157S q_ioterm_lus824.gif

Table 12 shows the termination current settings for three sensing resistors.

Table 12. Termination Current Settings for 55-mΩ, 68-mΩ, and 100-mΩ Sense Resistors

BIT VI(TERM) (mV) I(TERM) (mA)
R(SNS) = 55 mΩ
I(TERM) (mA)
R(SNS) = 68 mΩ
I(TERM) (mA)
R(SNS) = 100 mΩ
VI(TERM2) 13.6 247 200 136
VI(TERM1) 6.8 124 100 68
VI(TERM0) 3.4 62 50 34
Offset 3.4 62 50 34

For example, with a 68-mΩ sense resistor, V(ITERM2) = 1, V(ITERM1) = 0, and V(ITERM0) = 1, ITERM = [(13.6 mV × 1) + (6.8 mV × 0) + (3.4 mV × 1) + 3.4 mV] / 68 mΩ = 200 mA + 0 + 50 mA + 50 mA = 300 mA.

The charge current step (IO(CHARGE_STEP)) is calculated using Equation 12.

Equation 12. bq24157S q_iochg_lus824.gif

Table 13 shows the charge current settings for three sensing resistors.

Table 13. Charge Current Settings for 55-mΩ, 68-mΩ, and 100-mΩ Sense Resistors

BIT VI(REG) (mV) IO(CHARGE) (mA)
R(SNS) = 55 mΩ
IO(CHARGE) (mA)
R(SNS) = 68 mΩ
IO(CHARGE) (mA)
R(SNS) = 100 mΩ
VI(CHRG3) 54.4 989 800 544
VI(CHRG2) 27.2 495 400 272
VI(CHRG1) 13.6 247 200 136
VI(CHRG0) 6.8 124 100 68
Offset 37.4 680 550 374

For example, with a 68-mΩ sense resistor, V(CHRG3) = 1, V(CHRG2) = 0, V(ICHRG1) = 0, and V(ICHRG0) = 1, ITERM = [(54.4 mV × 1) + (27.2 mV × 0) + (13.6 mV × 0) + (6.8 mV × 1) + 37.4 mV] / 68 mΩ = 800 mA + 0 + 0 + 100 mA = 900 mA.

9.2.2.2 Output Inductor and Capacitance Selection Guidelines

The IC provides internal loop compensation. With the internal loop compensation, the highest stability occurs when the LC resonant frequency, ƒo, is approximately 40 kHz (20 to 80 kHz). Equation 13 can be used to calculate the value of the output inductor, LOUT, and output capacitor, COUT.

Equation 13. bq24157S q_fo_lus824.gif

To reduce the output voltage ripple, TI recommends a ceramic capacitor with the capacitance between 4.7 to 47 μF for COUT. See previous sections in the Detailed Design Procedure for components selection.

9.2.3 Application Curves

bq24157S G002_slusb76.gif
VBUS = 0 to 5 V IIN_limit = 500 mA VBATREG = 4.2 V
VBAT = 3.5 V ICHG = 550 mA
Figure 30. Adapter Insertion (HOST Mode)
bq24157S G004_slusb76.gif
VBUS = 5 V VBAT = 3.5 V IIN_limit = 500 mA
VBATREG = 4.2 V ICHG = 550 mA Termination Enabled
Figure 32. Battery Insertion/Removal Termination Disabled (HOST Mode)
bq24157S figure13_slusb60.gif
VBUS = 5.05 V VBAT = 3.5 V IBUS = 217 mA
Figure 34. Boost Waveform (PWM Mode)
bq24157S G003_slusb76.gif
VBUS = 5 V VBAT = 3.5 V IIN_limit = 500 mA
VBATREG = 4.2 V ICHG = 550 mA
Termination Enabled
Figure 31. Battery Insertion/Removal Termination Enabled (HOST Mode)
bq24157S figure6_slusb60.gif
VBUS = 5 V VBAT = 2.6 V VOREG = 4.2 V
ICHG = 950 mA
Figure 33. PWM Charging Waveforms
bq24157S figure24_slusb60.gif
5.5-V input voltage
Figure 35. Step Load from 0 to 2 A During Factory Mode