SLUSBS8B December   2013  – November 2019 BQ40Z50

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Supply Current
    6. 7.6  Electrical Characteristics: Power Supply Control
    7. 7.7  Electrical Characteristics: AFE Power-On Reset
    8. 7.8  Electrical Characteristics: AFE Watchdog Reset and Wake Timer
    9. 7.9  Electrical Characteristics: Current Wake Comparator
    10. 7.10 Electrical Characteristics: VC1, VC2, VC3, VC4, BAT, PACK
    11. 7.11 Electrical Characteristics: SMBD, SMBC
    12. 7.12 Electrical Characteristics: PRES, BTP_INT, DISP
    13. 7.13 Electrical Characteristics: LEDCNTLA, LEDCNTLB, LEDCNTLC
    14. 7.14 Electrical Characteristics: Coulomb Counter
    15. 7.15 Electrical Characteristics: CC Digital Filter
    16. 7.16 Electrical Characteristics: ADC
    17. 7.17 Electrical Characteristics: ADC Digital Filter
    18. 7.18 Electrical Characteristics: CHG, DSG FET Drive
    19. 7.19 Electrical Characteristics: PCHG FET Drive
    20. 7.20 Electrical Characteristics: FUSE Drive
    21. 7.21 Electrical Characteristics: Internal Temperature Sensor
    22. 7.22 Electrical Characteristics: TS1, TS2, TS3, TS4
    23. 7.23 Electrical Characteristics: PTC, PTCEN
    24. 7.24 Electrical Characteristics: Internal 1.8-V LDO
    25. 7.25 Electrical Characteristics: High-Frequency Oscillator
    26. 7.26 Electrical Characteristics: Low-Frequency Oscillator
    27. 7.27 Electrical Characteristics: Voltage Reference 1
    28. 7.28 Electrical Characteristics: Voltage Reference 2
    29. 7.29 Electrical Characteristics: Instruction Flash
    30. 7.30 Electrical Characteristics: Data Flash
    31. 7.31 Electrical Characteristics: OCD, SCC, SCD1, SCD2 Current Protection Thresholds
    32. 7.32 Timing Requirements: OCD, SCC, SCD1, SCD2 Current Protection Timing
    33. 7.33 Timing Requirements: SMBus
    34. 7.34 Timing Requirements: SMBus XL
    35. 7.35 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Primary (1st Level) Safety Features
      2. 8.3.2  Secondary (2nd Level) Safety Features
      3. 8.3.3  Charge Control Features
      4. 8.3.4  Gas Gauging
      5. 8.3.5  Configuration
        1. 8.3.5.1 Oscillator Function
        2. 8.3.5.2 System Present Operation
        3. 8.3.5.3 Emergency Shutdown
        4. 8.3.5.4 1-Series, 2-Series, 3-Series, or 4-Series Cell Configuration
        5. 8.3.5.5 Cell Balancing
      6. 8.3.6  Battery Parameter Measurements
        1. 8.3.6.1 Charge and Discharge Counting
      7. 8.3.7  Battery Trip Point (BTP)
      8. 8.3.8  Lifetime Data Logging Features
      9. 8.3.9  Authentication
      10. 8.3.10 LED Display
      11. 8.3.11 Voltage
      12. 8.3.12 Current
      13. 8.3.13 Temperature
      14. 8.3.14 Communications
        1. 8.3.14.1 SMBus On and Off State
        2. 8.3.14.2 SBS Commands
    4. 8.4 Device Functional Modes
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 High-Current Path
          1. 9.2.2.1.1 Protection FETs
          2. 9.2.2.1.2 Chemical Fuse
          3. 9.2.2.1.3 Lithium-Ion Cell Connections
          4. 9.2.2.1.4 Sense Resistor
          5. 9.2.2.1.5 ESD Mitigation
        2. 9.2.2.2 Gas Gauge Circuit
          1. 9.2.2.2.1 Coulomb-Counting Interface
          2. 9.2.2.2.2 Power Supply Decoupling and PBI
          3. 9.2.2.2.3 System Present
          4. 9.2.2.2.4 SMBus Communication
          5. 9.2.2.2.5 FUSE Circuitry
        3. 9.2.2.3 Secondary-Current Protection
          1. 9.2.2.3.1 Cell and Battery Inputs
          2. 9.2.2.3.2 External Cell Balancing
          3. 9.2.2.3.3 PACK and FET Control
          4. 9.2.2.3.4 Temperature Output
          5. 9.2.2.3.5 LEDs
          6. 9.2.2.3.6 Safety PTC Thermistor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Protector FET Bypass and Pack Terminal Bypass Capacitors
      2. 11.1.2 ESD Spark Gap
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

PACK and FET Control

The PACK and VCC inputs provide power to the BQ40Z50 from the charger. The PACK input also provides a method to measure and detect the presence of a charger. The PACK input uses a 100-Ω resistor; whereas, the VCC input uses a diode to guard against input transients and prevents mis-operation of the date driver during short-circuit events.

BQ40Z50 device_PACK_FET_cont_lua660.gifFigure 33. BQ40Z50 PACK and FET Control

The N-channel charge and discharge FETs are controlled with 5.1-kΩ series gate resistors, which provide a switching time constant of a few microseconds. The 10-MΩ resistors ensure that the FETs are off in the event of an open connection to the FET drivers. Q4 is provided to protect the discharge FET (Q3) in the event of a reverse-connected charger. Without Q4, Q3 can be driven into its linear region and suffer severe damage if the PACK+ input becomes slightly negative.

Q4 turns on in that case to protect Q3 by shorting its gate to source. To use the simple ground gate circuit, the FET must have a low gate turn-on threshold. If it is desired to use a more standard device, such as the 2N7002 as the reference schematic, the gate should be biased up to 3.3 V with a high-value resistor. The BQ40Z50 device has the capability to provide a current-limited charging path typically used for low battery voltage or low temperature charging. The BQ40Z50 device uses an external P-channel, pre-charge FET controlled by PCHG.