JAJSDZ1B January   2017  – October 2020 CC2640R2F-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 機能ブロック図
  5. Revision History
  6. Device Comparison
    1. 6.1 Related Products
  7. Terminal Configuration and Functions
    1. 7.1 Pin Diagram – RGZ Package
    2. 7.2 Signal Descriptions – RGZ Package
    3. 7.3 Wettable Flanks
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Consumption Summary
    5. 8.5  General Characteristics
    6. 8.6  1-Mbps GFSK (Bluetooth low energy Technology) – RX
    7. 8.7  1-Mbps GFSK (Bluetooth low energy Technology) – TX
    8. 8.8  24-MHz Crystal Oscillator (XOSC_HF)
    9. 8.9  32.768-kHz Crystal Oscillator (XOSC_LF)
    10. 8.10 48-MHz RC Oscillator (RCOSC_HF)
    11. 8.11 32-kHz RC Oscillator (RCOSC_LF)
    12. 8.12 ADC Characteristics
    13. 8.13 Temperature Sensor
    14. 8.14 Battery Monitor
    15. 8.15 Continuous Time Comparator
    16. 8.16 Low-Power Clocked Comparator
    17. 8.17 Programmable Current Source
    18. 8.18 Synchronous Serial Interface (SSI)
    19. 8.19 DC Characteristics
    20. 8.20 Thermal Resistance Characteristics for RGZ Package
    21. 8.21 Timing Requirements
    22. 8.22 Switching Characteristics
    23. 8.23 Typical Characteristics
  9. Detailed Description
    1. 9.1  Overview
    2. 9.2  Main CPU
    3. 9.3  RF Core
    4. 9.4  Sensor Controller
    5. 9.5  Memory
    6. 9.6  Debug
    7. 9.7  Power Management
    8. 9.8  Clock Systems
    9. 9.9  General Peripherals and Modules
    10. 9.10 System Architecture
  10. 10Application, Implementation, and Layout
    1. 10.1 Application Information
    2. 10.2 7 × 7 Internal Differential (7ID) Application Circuit
      1. 10.2.1 Layout
  11. 11Device and Documentation Support
    1. 11.1 Device Nomenclature
    2. 11.2 Tools and Software
    3. 11.3 Documentation Support
    4. 11.4 Texas Instruments Low-Power RF Website
    5. 11.5 サポート・リソース
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Export Control Notice
    9. 11.9 用語集
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Packaging Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • RGZ|48
サーマルパッド・メカニカル・データ
発注情報

Power Management

To minimize power consumption, the CC2640R2F-Q1 device supports a number of power modes and power management features (see Table 9-2).

Table 9-2 Power Modes
MODESOFTWARE CONFIGURABLE POWER MODESRESET PIN HELD
ACTIVEIDLESTANDBYSHUTDOWN
CPUActiveOffOffOffOff
FlashOnAvailableOffOffOff
SRAMOnOnOnOffOff
RadioAvailableAvailableOffOffOff
Supply SystemOnOnDuty CycledOffOff
Current1.45 mA + 31 µA/MHz650 µA1.3 µA0.15 µA0.1 µA
Wake-up Time to CPU Active(1)14 µs151 µs1015 µs1015 µs
Register RetentionFullFullPartialNoNo
SRAM RetentionFullFullFullNoNo
High-Speed ClockXOSC_HF or
RCOSC_HF
XOSC_HF or
RCOSC_HF
OffOffOff
Low-Speed ClockXOSC_LF or
RCOSC_LF
XOSC_LF or
RCOSC_LF
XOSC_LF or RCOSC_LFOffOff
PeripheralsAvailableAvailableOffOffOff
Sensor ControllerAvailableAvailableAvailableOffOff
Wake up on RTCAvailableAvailableAvailableOffOff
Wake up on Pin EdgeAvailableAvailableAvailableAvailableOff
Wake up on Reset PinAvailableAvailableAvailableAvailableAvailable
Brown Out Detector (BOD)ActiveActiveDuty CycledOffN/A
Power On Reset (POR)ActiveActiveActiveActiveN/A
Not including RTOS overhead

In active mode, the application Cortex-M3 CPU is actively executing code. Active mode provides normal operation of the processor and all of the peripherals that are currently enabled. The system clock can be any available clock source (see Table 9-2).

In idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked and no code is executed. Any interrupt event will bring the processor back into active mode.

In standby mode, only the always-on domain (AON) is active. An external wake event, RTC event, or sensor-controller event is required to bring the device back to active mode. MCU peripherals with retention do not need to be reconfigured when waking up again, and the CPU continues execution from where it went into standby mode. All GPIOs are latched in standby mode.

In shutdown mode, the device is turned off entirely, including the AON domain and the Sensor Controller. The I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin defined as a wake from Shutdown pin wakes up the device and functions as a reset trigger. The CPU can differentiate between a reset in this way, a reset-by-reset pin, or a power-on-reset by reading the reset status register. The only state retained in this mode is the latched I/O state and the Flash memory contents.

The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor Controller independently of the main CPU, which means that the main CPU does not have to wake up, for example, to execute an ADC sample or poll a digital sensor over SPI. The main CPU saves both current and wake-up time that would otherwise be wasted. The Sensor Controller Studio enables the user to configure the sensor controller and choose which peripherals are controlled and which conditions wake up the main CPU.