SNAS515G July   2011  – December 2014 DAC161P997

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Application
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Error Detection and Reporting
      2. 7.3.2 Alarm Current
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Single-Wire Interface (SWIF)
        1. 7.5.1.1 Frame Format
        2. 7.5.1.2 Inter-Frame Period
        3. 7.5.1.3 Symbol Set
        4. 7.5.1.4 Interface Circuit
          1. 7.5.1.4.1 Transformer Coupled Interface - Data Flow to the DAC
          2. 7.5.1.4.2 Transformer Coupled Interface - Acknowledge Pulse
          3. 7.5.1.4.3 DC-Coupled Interface
          4. 7.5.1.4.4 Transformer Selection and SWIF Data Link Circuit Design
    6. 7.6 Register Maps
      1. 7.6.1 LCK
      2. 7.6.2 CONFIG1
      3. 7.6.3 CONFIG2
      4. 7.6.4 CONFIG3
      5. 7.6.5 ERR_LOW
      6. 7.6.6 ERR_HIGH
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 16-BIT DAC and Loop Drive
        1. 8.1.1.1 DC Characteristics
          1. 8.1.1.1.1 DC Input-Output Transfer Function
          2. 8.1.1.1.2 Loop Interface
          3. 8.1.1.1.3 Loop Compliance
        2. 8.1.1.2 AC Characteristics
          1. 8.1.1.2.1 Step Response
          2. 8.1.1.2.2 Output Impedance
          3. 8.1.1.2.3 PSRR
          4. 8.1.1.2.4 Stability
          5. 8.1.1.2.5 Noise and Ripple
          6. 8.1.1.2.6 Digital Feedthrough
          7. 8.1.1.2.7 HART Signal Injection
          8. 8.1.1.2.8 RC Filter Limitation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Power Supply Recommendations

The DAC161P997 requires a voltage supply within 2.7 V and 3.6 V. Multilayer ceramic bypass X7R capacitors of 0.1μF between the VA and GND pins, and between the VD and GND pins are recommended. If the supply is located more than a few inches from the DAC161P997, additional bulk capacitance may be required in addition to the ceramic bypass capacitors. An electrolytic capacitor with a value of 10 μF or 22 μF is a typical choice