JAJSK47D August   2020  – December 2023 DP83TD510E

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
    1.     Pin Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagrams
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Auto-Negotiation (Speed Selection)
      2. 6.3.2  Repeater Mode
      3. 6.3.3  Media Converter
      4. 6.3.4  Clock Output
      5. 6.3.5  Media Independent Interface (MII)
      6. 6.3.6  Reduced Media Independent Interface (RMII)
      7. 6.3.7  RMII Low Power 5-MHz Mode
      8. 6.3.8  RGMII Interface
      9. 6.3.9  Serial Management Interface
      10. 6.3.10 Extended Register Space Access
        1. 6.3.10.1 Read (No Post Increment) Operation
        2. 6.3.10.2 Read (Post Increment) Operation
        3. 6.3.10.3 Write (No Post Increment) Operation
        4. 6.3.10.4 Write (Post Increment) Operation
      11. 6.3.11 Loopback Modes
        1. 6.3.11.1 MII Loopback
        2. 6.3.11.2 PCS Loopback
        3. 6.3.11.3 Digital Loopback
        4. 6.3.11.4 Analog Loopback
        5. 6.3.11.5 Far-End (Reverse) Loopback
      12. 6.3.12 BIST Configurations
      13. 6.3.13 Cable Diagnostics
        1. 6.3.13.1 TDR
        2. 6.3.13.2 Fast Link Down Functionality
    4. 6.4 Device Functional Modes
      1. 6.4.1 Straps Configuration
        1. 6.4.1.1 Straps for PHY Address
    5. 6.5 Programming
    6. 6.6 MMD Register Address Map
    7. 6.7 DP83TD510E Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Termination Circuit
        1. 7.2.1.1 Termination Circuit for Intrinsic Safe Applications
        2. 7.2.1.2 Components Range for Power Coupling/Decoupling
        3. 7.2.1.3 Termination Circuit for Non-Intrinsic Safe Applications
        4. 7.2.1.4 CMC Specifications
      2. 7.2.2 Design Requirements
        1. 7.2.2.1 Clock Requirements
          1. 7.2.2.1.1 Oscillator
          2. 7.2.2.1.2 Crystal
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Signal Traces
        2. 7.4.1.2 Return Path
        3. 7.4.1.3 Metal Pour
        4. 7.4.1.4 PCB Layer Stacking
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.13.1 TDR

The DP83TD510E uses Time Domain Reflectometry (TDR) to determine the quality of the cables, connectors and terminations in addition to estimating the cable length. Some of the possible problems that can be diagnosed include opens, shorts, cable impedance mismatch, bad connectors, termination mismatches, cross faults, cross shorts and any other discontinuities along the cable.

The DP83TD510E transmits a test pulse of known amplitude (1 V) down each of the two pairs of an attached cable. The transmitted signal continues down the cable and reflects from each cable imperfection, fault, connector and from the end of the cable itself. After the pulse transmission, the DP83TD510E measures the return time and amplitude of all these reflected pulses. This technique enables measuring the distance and magnitude (impedance) of non-terminated cables (open or short), discontinuities (bad connectors) and improperly terminated cables with ±1-m accuracy.

For all TDR measurements, the transformation between time of arrival and physical distance is done by the external host using minor computations (such as multiplication, addition and lookup tables). The host must know the expected propagation delay of the cable, which depends, among other things, on the cable category (for example, CAT5, CAT5e, or CAT6).

TDR measurement is allowed in the following scenarios:

  • While the Link Partner is disconnected – cable is unplugged at the other side
  • Link Partner is connected but remains “quiet” (for example, in power down mode)
  • TDR could be automatically activated when the link fails or is dropped

TDR control and result register bit functions relevant for TDR procedure are summarized in the table below:

Table 6-6 TDR Register Summary
Register Name Register Address Register Function Description
TDR_CFG 0x1E Manual TDR start [15] and TDR completion status [1:0] Manually start and monitor TDR
TDR_CFG2 0x301 TDR sweep index configuration Configure constant for internal measurement equation
FAULT_CFG1 0x303 TDR fault offset and tap index configuration Configure constant for internal measurement equation
TDR_Fault_Status 0x30C Bits [9:0] store fault location in meters, Bit [11] stores fault detection status, and [10] stores the sign of this fault Convert [9:0] to decimal for fault location in meters
Fault detected [11] = '1' No fault detected [11] = '0'
Open fault [10] = '1'Short fault [10] = '0'

Please refer to Cable Diagnostics Appnote SNLA364 for more details on utilizing these registers for TDR procedure.

ALCD (Active Link Cable Diagnostics)

While TDR offers a way to measure the cable length of a system prior to establishing link, Active Link Cable Diagnostics (ALCD) allows the PHY to determine the cable length during an active link with its link partner. It uses passive digital signal processing along with pre-defined cable parameters to achieve the highest accuracy in its cable length estimate. The estimated cable length can be cross-verified with the physical length of the cable to determine whether there is deviation in cable characteristics and understand how the PHY may perform as the cable ages.

It's important tot note that in Single-Pair Ethernet applications, cable characteristics differ more widely than in standard Ethernet applications (where CAT5, CAT5E, CAT6 cables are dominantly used). As such, the ALCD measurement information generated by DP83TD510E can be combined with the parameters of a specific cable model to generate the most accurate cable length estimate. Please refer to DP83TD510E Cable Diagnostics Appnote SNLA364.

SQI (Signal Quality Indicator)

While TDR can provide information about the existence and location of cable faults, a real-time monitor of the link quality can provide valuable information before a fault occurs. The DP83TD510E provides real-time signal-to-noise ratio monitoring for an application.

The cable quality, connector contact, and surrounding environment contribute to the overall channel quality. The Signal Quality Indicator (SQI) can provide insights to the physical connections in an application assembly before it ships, the link quality of a system in noisy environments and immunity testing, or the lifetime trend of a product's health as it ages.

The DP83TD510E monitors link quality by measuring the SNR at periodic intervals whenever an active link is established. The PHY measures the accumulated mean-square error (MSE) in the received signal at the PAM3 slicer from its sliced output level. The signal quality monitoring functions are run automatically in the background of the PHY. Please refer to DP83TD510E Cable Diagnostics Appnote SNLA364 for the detailed SQI measurement procedure.