JAJSSO9B August   2023  – April 2024 ISO6520 , ISO6521

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Package Characteristics
    6. 5.6  Electrical Characteristics—5-V Supply
    7. 5.7  Supply Current Characteristics—5-V Supply
    8. 5.8  Electrical Characteristics—3.3-V Supply
    9. 5.9  Supply Current Characteristics—3.3-V Supply
    10. 5.10 Electrical Characteristics—2.5-V Supply 
    11. 5.11 Supply Current Characteristics—2.5-V Supply
    12. 5.12 Electrical Characteristics—1.8-V Supply
    13. 5.13 Supply Current Characteristics—1.8-V Supply
    14. 5.14 Switching Characteristics—5-V Supply
    15. 5.15 Switching Characteristics—3.3-V Supply
    16. 5.16 Switching Characteristics—2.5-V Supply
    17. 5.17 Switching Characteristics—1.8-V Supply
    18. 5.18 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device I/O Schematics
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 PCB Material
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.5 Package Characteristics

PARAMETER TEST CONDITIONS VALUE VALUE UNIT
8-REU 8-D
CLR External clearance(1) Shortest pin to pin distance through air >2.2 >4 mm
CPG External creepage(1) Shortest pin to pin distance across the package surface >2.2 >4 mm
CTI Comparative tracking index IEC 60112; UL 746A >400 >400 V
Material Group According to IEC 60664-1 II II
CIO Capacitance, input to output(2) VIO = 0.4 × sin (2 πft), f = 1 MHz ≅0.5 ≅0.5 pF
RIO Resistance, input to output(2) TA = 25°C >1012 >1012 Ω
(1) Creepage and clearance requirements must be applied according to the specific equipment isolation standards of an application. Care must be taken to maintain the creepage and clearance distance of a board design to verify that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these specifications.
(2) All pins on each side of the barrier tied together creating a two-pin device.