JAJSDP1B December   2016  – April 2017 LDC2112 , LDC2114

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. 概要(続き)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Digital Interface
    7. 7.7 I2C Interface
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Multi-Channel and Single-Channel Operation
      2. 8.3.2 Button Output Interfaces
      3. 8.3.3 Programmable Button Sensitivity
      4. 8.3.4 Baseline Tracking
      5. 8.3.5 Integrated Button Algorithms
      6. 8.3.6 I2C Interface
        1. 8.3.6.1 Selectable I2C Address (LDC2112 Only)
        2. 8.3.6.2 I2C Interface Specifications
        3. 8.3.6.3 I2C Bus Control
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Power Mode
      2. 8.4.2 Low Power Mode
      3. 8.4.3 Configuration Mode
    5. 8.5 Register Maps
      1. 8.5.1 Individual Register Listings
        1. 8.5.1.1 Gain Table for Registers GAIN0, GAIN1, GAIN2, and GAIN3
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1  Theory of Operation
      2. 9.1.2  Designing Sensor Parameters
      3. 9.1.3  Setting COM Pin Capacitor
      4. 9.1.4  Defining Power-On Timing
      5. 9.1.5  Configuring Button Scan Rate
      6. 9.1.6  Programming Button Sampling Window
      7. 9.1.7  Scaling Frequency Counter Output
      8. 9.1.8  Setting Button Triggering Threshold
      9. 9.1.9  Tracking Baseline
      10. 9.1.10 Mitigating False Button Detections
        1. 9.1.10.1 Eliminating Common-Mode Change (Anti-Common)
        2. 9.1.10.2 Resolving Simultaneous Button Presses (Max-Win)
        3. 9.1.10.3 Overcoming Case Twisting (Anti-Twist)
        4. 9.1.10.4 Mitigating Metal Deformation (Anti-Deform)
      11. 9.1.11 Reporting Interrupts for Button Presses and Error Conditions
      12. 9.1.12 Estimating Supply Current
    2. 9.2 Typical Application
      1. 9.2.1 Touch Button Design
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 DSBGA Light Sensitivity
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 関連リンク
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 輸出管理に関する注意事項
    8. 12.8 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Power Supply Recommendations

The LDC2112/LDC2114 power supply should be bypassed with a 1 µF and a 0.1 µF pair of capacitors in parallel to ground. The capacitors should be placed as close to the LDC as possible. The smaller value 0.1 µF capacitor should be placed closer to the VDD pin than the 1 µF capacitor. The capacitors should be a low ESL, low ESR type. To enable close positioning of the capacitors, use of 0201 footprint devices for the bypass capacitors is recommended for the DSBGA package.

Refer to Recommended Operating Conditions for more details.