SNVS555D January   2008  – December 2014 LM3881

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Adjustable Timing
      2. 7.3.2 Enable Circuit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Up with EN Pin
      2. 7.4.2 Power Down with EN Pin
      3. 7.4.3 Noninverted Output Mode
      4. 7.4.4 Inverted Output Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Open-Drain Flags Pullup
      2. 8.1.2 Enable the Device
      3. 8.1.3 Timing Adjust
    2. 8.2 Typical Application
      1. 8.2.1 Simple Sequencing of Three Power Supplies
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Sequencing Using Independent Flag Supply
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Layout

10.1 Layout Guidelines

  • Pullup resistors should be connected between the flag output pins and a positive input supply, usually VCC. An independent flag supply may also be used. These resistors should be placed as close as possible to the Simple Power Sequencer and the flag supply. Minimal trace length is recommended to make the connections. A typical value for the pullup resistors is 100kΩ.
  • For very tight sequencing requirements, minimal and equal trace lengths should be used to connect the flag outputs to the desired inputs. This will reduce any propagation delay and timing errors between the flag outputs along the line.

10.2 Layout Example

Figure 24 and Figure 25 are layout examples for the LM3881. These examples are taken from the LM3881EVAL. An optional component, assigned reference designator R4, is placed on the bottom side of the PCB to facilitate connection of INV to GND.

lm3881_top.pngFigure 24. LM3881 Top
lm3881_bottom.pngFigure 25. LM3881 Bottom