JAJSOR1D june   2022  – august 2023 LM5177

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Parameter Measurement Information
    1. 7.1 Gate Driver Rise Time and Fall Time
    2. 7.2 Gate Driver Dead (Transition) Time
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power-On Reset (POR System)
      2. 8.3.2  Buck-Boost Control Scheme
        1. 8.3.2.1 Boost Mode
        2. 8.3.2.2 Buck Mode
        3. 8.3.2.3 Buck-Boost Mode
      3. 8.3.3  Power Save Mode
      4. 8.3.4  Supply Voltage Selection – VMAX Switch
      5. 8.3.5  Enable and Undervoltage Lockout
      6. 8.3.6  Oscillator Frequency Selection
      7. 8.3.7  Frequency Synchronization
      8. 8.3.8  Voltage Regulation Loop
      9. 8.3.9  Output Voltage Tracking
      10. 8.3.10 Slope Compensation
      11. 8.3.11 Configurable Soft Start
      12. 8.3.12 Peak Current Sensor
      13. 8.3.13 Current Monitoring and Current Limit Control Loop
      14. 8.3.14 Short Circuit - Hiccup Protection
      15. 8.3.15 nFLT Pin and Protections
      16. 8.3.16 Device Configuration Pin
      17. 8.3.17 Dual Random Spread Spectrum – DRSS
      18. 8.3.18 Gate Driver
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design with WEBENCH Tools
        2. 9.2.2.2  Frequency
        3. 9.2.2.3  Feedback Divider
        4. 9.2.2.4  Inductor and Current Sense Resistor Selection
        5. 9.2.2.5  Slope Compensation
        6. 9.2.2.6  Output Capacitor
        7. 9.2.2.7  Input Capacitor
        8. 9.2.2.8  UVLO Divider
        9. 9.2.2.9  Soft-Start Capacitor
        10. 9.2.2.10 MOSFETs QH1 and QL1
        11. 9.2.2.11 MOSFETs QH2 and QL2
        12. 9.2.2.12 Frequency Compensation
        13. 9.2.2.13 External Component Selection
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Bi-Directional Power Backup
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Power Stage Layout
      2. 11.1.2 Gate Driver Layout
      3. 11.1.3 Controller Layout
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 サード・パーティ製品に関する免責事項
      2. 12.1.2 Development Support
        1. 12.1.2.1 Custom Design with WEBENCH Tools
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Current Monitoring and Current Limit Control Loop

The LM5177 features two high voltage current sensors. The first one maintains the peak current sensing between the CSA and CSB pins. The second current sensor inputs are connected to the ISNSP and ISNSN pins.

This optional current sensing provides the capability to monitor or to limit either the input or the output current of the DC/DC converter If the optional current sense amplifier is not used, the user can disable it to reduce the bias current consumption of the whole device by connecting the IMONOUT pin to VCC. Do not do this dynamical during the operation of the device because the configuration gets latched at start-up of the converter. Use the CFG pin to select one of the following desired operation modes.

Current Monitor Operation:

In case the current sense amplifier is configured as a monitor, the output voltage on the IMONOUT pin is a linear relation between the sense voltage between ISNSP and ISNSN pins and the sense amplifier transcendence as well as the resistor placed on the IMONOUT pin:

Equation 17. V ( I M O N O U T ) = ( V ( I S N S P ) - V ( I S N S N ) ) × g m × R ( I M O N O U T )

The output voltage of the IMONOUT pin is clamped to the values given in specifications section.

If the user intends to reduce the bandwidth of the current monitor, the user can place an optional capacitor in parallel to the IMONOUT pin like it is indicated in Figure 8-18.

Current Limit Operation:

In this configuration, the current sense gm amplifier monitors the voltage across the sense resistor and compares it with an internal reference voltage. If the drop across the sense resistor is greater than the reference threshold the gm amplifier gradually reduces the peak current capability of the DC/DC converter until the differential voltage is equal the reference voltage. This function of the LM5177 can be used to do the following:

  • Regulate the current into the load from the power stage
  • Regulate the current from the output into the power stage
  • Regulated the current from the input supply to the power stage
  • Regulated the current into the device input from the power stage
To select a negative current limit direction, the SYNC pin needs to be pulled low for the time when EN/UVLO goes above the EN rising threshold until the soft-start ramp starts the converter operation. The configuration gets latched and the SYNC pin can be used for the synchronization afterward. If the synchronization function is not used it can be pulled low continuously. For a positive current limit protection the SYNC pin can be pulled high or connected to a valid synchronization signal during the time when EN/UVLO goes above the EN rising threshold until the soft-start ramp starts the converter operation

Once the current limit operation mode is selected, a RC compensation network must be placed on the IMONOUT pin. For most applications, a compensation bandwidth with a factor of 3× to 5× faster than the compensation of the output voltage loop has given good results.

GUID-20201026-CA0I-LQFH-D8WF-SGNPTNDHMF1S-low.gif Figure 8-18 Current Monitor Functional Block Diagram