JAJS842D May   1999  – February 2024 LM7171

PRODUCTION DATA  

  1.   1
  2. 1特長
  3. 2アプリケーション
  4. 3概要
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: ±15V
    6. 5.6 Electrical Characteristics: ±5V
    7. 5.7 Typical Characteristics: LM7171A
    8. 5.8 Typical Characteristics: LM7171B
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Circuit Operation
      2. 6.1.2 Slew Rate Characteristic
        1. 6.1.2.1 Slew-Rate Limitation
      3. 6.1.3 Compensation for Input Capacitance
    2. 6.2 Typical Applications
    3. 6.3 Power Supply Recommendations
      1. 6.3.1 Power-Supply Bypassing
      2. 6.3.2 Termination
      3. 6.3.3 Driving Capacitive Loads
      4. 6.3.4 Power Dissipation
    4. 6.4 Layout
      1. 6.4.1 Layout Guidelines
        1. 6.4.1.1 Printed Circuit Board and High-Speed Op Amps
        2. 6.4.1.2 Using Probes
        3. 6.4.1.3 Component Selection and Feedback Resistor
  8. 7Device and Documentation Support
    1. 7.1 ドキュメントの更新通知を受け取る方法
    2. 7.2 サポート・リソース
    3. 7.3 Trademarks
    4. 7.4 静電気放電に関する注意事項
    5. 7.5 用語集
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.1.1 Circuit Operation

The class AB input stage in LM7171 is fully symmetrical and has a similar slewing characteristic to a CFA. In the LM7171 simplified schematic, Q1 through Q4 form the equivalent of the current-feedback input buffer, RE the equivalent of the feedback resistor, and stage A buffers the inverting input. The triple-buffered output stage isolates the gain stage from the load to provide low output impedance.