SNOSD61
June 2017
LMC6482-MIL
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics for V+ = 5 V
5.6
Electrical Characteristics for V+ = 3 V
5.7
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Amplifier Topology
6.3.2
Input Common-Mode Voltage Range
6.3.3
Rail-to-Rail Output
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.1.1
Upgrading Applications
7.1.2
Data Acquisition Systems
7.1.3
Instrumentation Circuits
7.1.4
Spice Macromodel
7.2
Typical Applications
7.2.1
3-V Single Supply Buffer Circuit
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.2.1
Capacitive Load Compensation
7.2.1.2.1.1
Capacitive Load Tolerance
7.2.1.2.1.2
Compensating for Input Capacitance
7.2.1.2.1.3
Offset Voltage Adjustment
7.2.1.3
Application Curves
7.2.2
Typical Single-Supply Applications
8
Power Supply Recommendations
9
Layout
9.1
Layout Guidelines
9.2
Layout Example
10
Device and Documentation Support
10.1
Trademarks
10.2
Electrostatic Discharge Caution
10.3
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
Y|0
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snosd61_oa