JAJS838F August   1999  – January 2025 LMC7111

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics for VS = 2.7V or ±1.35V
    6. 5.6  Electrical Characteristics for VS = 5V or ±2.5V
    7. 5.7  Electrical Characteristics for VS = 10V or ±5V
    8. 5.8  Typical Characteristics
    9. 5.9  Typical Characteristics: 2.7V
    10. 5.10 Typical Characteristics: 3V
    11. 5.11 Typical Characteristics: 5V
    12. 5.12 Typical Characteristics: 10V
  7. 6 Detailed Description
    1. 6.1 Feature Description
      1. 6.1.1 Benefits of the LMC7111 Tiny Amp
        1. 6.1.1.1 Size
        2. 6.1.1.2 Height
        3. 6.1.1.3 Signal Integrity
        4. 6.1.1.4 Simplified Board Layout
        5. 6.1.1.5 Low Supply Current
        6. 6.1.1.6 Wide Voltage Range
      2. 6.1.2 Input Common-Mode Voltage Range
      3. 6.1.3 Output Swing
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Capacitive Load Tolerance
      2. 7.1.2 Compensating for Input Capacitance When Using Large-Value Feedback Resistors
      3. 7.1.3 Dual and Quad Devices With Similar Performance
    2. 7.2 Typical Application
      1. 7.2.1 Biasing GaAs RF Amplifiers
      2. 7.2.2 Reference Buffer for Analog-to-Digital Converters
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Spice Macromodel
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.5 Electrical Characteristics for VS = 2.7V or ±1.35V

at TA = +25°C, V+ = 2.7V, V– = 0V, VCM = VO = V+ / 2, and RL > 1MΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage ±0.9 ±7 mV
TJ = –40°C to +85°C ±9
dVOS/dT Input offset voltage drift ±10 µV/°C
PSRR Power-supply rejection ratio Positive
2.7V < V+ < 5V, V– = 0V		 55 60 dB
TJ = –40°C to +85°C 50
Negative
2.7V < V+ < 5V, V+ = 0V		 55 60
TJ = –40°C to +85°C 50
INPUT BIAS CURRENT
IB Input bias current (1) ±0.1 ±1 pA
TJ = –40°C to +85°C ±20
IOS Input offset current (1) ±0.01 ±0.5 pA
TJ = –40°C to +85°C ±10
INPUT VOLTAGE
VCM Input common-mode voltage To positive rail
CMRR ≥ 47dB		 2.7 2.8 V
TJ = –40°C to +85°C 2.25
To negative rail
CMRR ≥ 41dB		 –0.10 0.0
TJ = –40°C to +85°C 0.40
To positive rail
CMRR ≥ 47dB, V+ = 3V		 3.0 3.2
TJ = –40°C to +85°C 2.8
To negative rail, CMRR > 47dB, V+ = 3V –0.25 0.0
To positive rail
CMRR ≥ 47dB, V+ = 3.3V		 3.4 3.5
TJ = –40°C to +85°C 3.2
To negative rail
CMRR ≥ 47dB, V+ = 3.3V		 –0.25 –0.10
TJ = –40°C to +85°C 0.0
INPUT IMPEDANCE
RIN Input resistance > 10 TΩ
CIN Input capacitance Common mode 3 pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain Sourcing 400 V/mV
Sinking 150
FREQUENCY RESPONSE
GBW Gain bandwidth product 40 kHz
SR Slew rate 0.015 V/µs
OUTPUT
VO Voltage output swing Positive rail
RL = 100kΩ		 2.68 2.69 V
TJ = –40°C to +85°C 2.40
Negative rail
RL = 100kΩ		 0.10 0.20
TJ = –40°C to +85°C 0.08
Positive rail
RL = 10kΩ		 2.60 2.65
TJ = –40°C to +85°C 2.40
Negative rail
RL = 10kΩ		 0.03 0.10
TJ = –40°C to +85°C 0.3
ISC Short-circuit current Sourcing (VO = 0V) and sinking (VO = 2.7V) 1 7 mA
TJ = –40°C to +85°C 0.7
POWER SUPPLY
IQ Quiescent current per amplifier 20 50 µA
TJ = –40°C to +85°C 65
(1) Input bias current specified by design and processing.