JAJSS46 November   2023 LMG3612

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 GaN Power FET Switching Parameters
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 GaN Power FET Switching Capability
      2. 7.3.2 Turn-On Slew-Rate Control
      3. 7.3.3 Input Control Pin (IN)
      4. 7.3.4 AUX Supply Pin
        1. 7.3.4.1 AUX Power-On Reset
        2. 7.3.4.2 AUX Under-Voltage Lockout (UVLO)
      5. 7.3.5 Overtemperature Protection
      6. 7.3.6 Fault Reporting
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Turn-On Slew-Rate Design
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Solder-Joint Stress Relief
        2. 8.4.1.2 Signal-Ground Connection
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.4.1.1 Solder-Joint Stress Relief

Large QFN packages can experience high solder-joint stress. Several best practices are recommended to provide solder-joint stress relief. First, the instructions for the NC1, NC2, and NC3 anchor pins found in Table 4-1 must be followed. Second, all the board solder pads must be non-solder-mask defined (NSMD) as shown in the land pattern example in the Mechanical, Packaging, and Orderable Infromation section. Finally, any board trace connected to an NSMD pad must be less than two thirds the width of the pad on the pad side where it is connected. The trace must maintain this two-thirds width limit for as long as it is not covered by solder mask. After the trace is under solder mask, there are no limits on the trace dimensions. All these recommendations are followed in the Layout Example section.