SNAS642A June   2014  – July 2014 LMK00804B

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Pin Characteristics
    2. 7.2  Absolute Maximum Ratings
    3. 7.3  Handling Ratings
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Thermal Information
    6. 7.6  Power Supply Characteristics
    7. 7.7  LVCMOS / LVTTL DC Characteristics
    8. 7.8  Differential Input DC Characteristics
    9. 7.9  Electrical Characteristics (VDDO = 3.3 V ± 5%)
    10. 7.10 Electrical Characteristics (VDDO = 2.5 V ± 5%)
    11. 7.11 Electrical Characteristics (VDDO = 1.8 V ± 0.15 V)
    12. 7.12 Electrical Characteristics (VDDO = 1.5 V ± 5%)
    13. 7.13 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
      1. 9.2.1 25
    3. 9.3 Feature Description
      1. 9.3.1 Clock Enable Timing
    4. 9.4 Device Functional Modes
      1. 9.4.1 Clock Input Function
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Output Clock Interface Circuit
    3. 10.3 Input Detail
    4. 10.4 Input Clock Interface Circuits
    5. 10.5 Typical Applications
      1. 10.5.1 Design Requirements
      2. 10.5.2 Detailed Design Procedure
      3. 10.5.3 Application Curves
        1. 10.5.3.1 System-Level Phase Noise and Additive Jitter Measurement
    6. 10.6 Do's and Don'ts
      1. 10.6.1 Power Considerations
      2. 10.6.2 Recommendations for Unused Input and Output Pins
      3. 10.6.3 Input Slew Rate Considerations
  11. 11Power Supply Recommendations
    1. 11.1 Power Supply Considerations
      1. 11.1.1 Power-Supply Filtering
      2. 11.1.2 Thermal Management
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ground Planes
      2. 12.1.2 Power Supply Pins
      3. 12.1.3 Differential Input Termination
      4. 12.1.4 LVCMOS Input Termination
      5. 12.1.5 Output Termination
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

13 Device and Documentation Support

13.1 Device Support

For device and documentation support, please direct your inquiries to the TI E2E Support Forums for Clocking Products.

13.2 Trademarks

All other trademarks are the property of their respective owners.

13.3 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

13.4 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.