SNOSAI3D October   2006  â€“ September 2015 LMV951

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: 1 V
    6. 6.6 Electrical Characteristics: 1.8 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Battery Operated Systems
      2. 7.3.2 Small Size
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Capability
      2. 7.4.2 Rail-to-Rail Input
      3. 7.4.3 Rail-to-Rail Output
      4. 7.4.4 Driving Capacitive Load
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Two Wire Line Transmission
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Bridge Configuration Amplifier
      3. 8.2.3 Virtual Ground Circuit
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

See (1)(2)
MIN MAX UNIT
Supply Voltage (V+ – V−) 3.1 V
VIN Differential ±0.3 V
Voltage at Input and Output Pin (V+) + 0.3 (V−) − 0.3 V
Current at Input Pin ±10 mA
Junction Temperature (1) –40 150 °C
Mounting Temperature, Infrared or Convection (20 s) 235 °C
Storage temperature –60 150 °C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(2) ±2000 V
Machine model ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

6.3 Recommended Operating Conditions

MIN MAX UNIT
Temperature Range (1) –40 125 °C
Supply Voltage 0.9 3 V
(1) The maximum power dissipation is a function of TJ(MAX), RθJA. The maximum allowable power dissipation at any ambient temperature is PD = TJ(MAX) - TA)/RθJA. All numbers apply for packages soldered directly onto a PC Board.

6.4 Thermal Information

THERMAL METRIC(1) LMV951 UNIT
DDC (SOT)
6 PINS
RθJA Junction-to-ambient thermal resistance(1) 170 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics: 1 V

Unless otherwise specified, all limits specified for at TA = 25°C, V+ = 1, V− = 0 V, VCM = 0.5 V, Shutdown = 0 V, and RL = 1 MΩ.(1)
PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT
VOS Input Offset Voltage TA = 25°C 1.5 2.8 mV
At the temperature extremes 3
TC VOS Input Offset Average Drift 0.15 μV/°C
IB Input Bias Current TA = 25°C 32 80 nA
At the temperature extremes 85
IOS Input Offset Current 0.2 nA
CMRR Common-Mode Rejection Ratio 0 V ≤ VCM ≤ 1 V TA = 25°C 67 77 dB
At the temperature extremes 55
0.1 V ≤ VCM ≤ 1 V TA = 25°C 76 85
At the temperature extremes 73
PSRR Power Supply Rejection Ratio 1 V ≤ V+ ≤ 1.8 V, VCM = 0.5 V TA = 25°C 70 92 dB
At the temperature extremes 67
1 V ≤ V+ ≤ 3 V, VCM = 0.5 V TA = 25°C 68 85
At the temperature extremes 65
VCM Input Common-Mode Voltage Range CMRR ≥ 67 dB 0 1.2 V
CMRR ≥ 55 dB At the temperature extremes 0 1.2
AV Large Signal Voltage Gain VOUT = 0.1 V to 0.9 V
RL = 600 Ω to 0.5 V		 TA = 25°C 90 106 dB
At the temperature extremes 85
VOUT = 0.1 V to 0.9 V
RL = 2 kΩ to 0.5 V		 TA = 25°C 90 112
At the temperature extremes 86
VOUT Output Voltage Swing High RL = 600 Ω to 0.5 V TA = 25°C 50 25 mV from
rail
At the temperature extremes 62
RL = 2 kΩ to 0.5 V TA = 25°C 25 12
At the temperature extremes 36
Output Voltage Swing Low RL = 600 Ω to 0.5 V TA = 25°C 70 32
At the temperature extremes 85
RL = 2 kΩ to 0.5 V TA = 25°C 35 10
At the temperature extremes 40
IOUT Output Short-Circuit Current (4) Sourcing
VO = 0 V, VIN(DIFF) = ±0.2 V		 TA = 25°C 20 45 mA
At the temperature extremes 15
Sinking
VO = 1 V, VIN(DIFF) = ±0.2 V		 TA = 25°C 20 35
At the temperature extremes 13
IS Supply Current Active Mode VSD <0.4 V 370 480 μA
520
Shutdown Mode VSD >0.6 V TA = 25°C 0.01 1
At the temperature extremes 3
SR Slew Rate See (5) 1.4 V/μs
GBWP Gain Bandwidth Product 2.7 MHz
en Input-Referred Voltage Noise f = 1 kHz 25 nV/√Hz
in Input-Referred Current Noise f = 1 kHz 0.2 pA/√Hz
THD Total Harmonic Distortion f = 1 kHz, AV = 1, RL = 1 kΩ 0.02%
ISD Shutdown Pin Current Active Mode, VSD = 0 V .001 1 µA
Shutdown Mode, VSD = 1 V .001 1
VSD Shutdown Pin Voltage Range Active Mode 0 0.4 V
Shutdown Mode 0.65 1
(1) Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions is very limited self-heating of the device.
(2) All limits are specified by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(4) The short-circuit test is a momentary test, the short-circuit duration is 1.5 ms.
(5) Number specified is the average of the positive and negative slew rates.

6.6 Electrical Characteristics: 1.8 V

Unless otherwise specified, all limits specified for at TA = 25°C, V+ = 1.8 V, V− = 0 V, VCM = 0.9 V, Shutdown = 0 V, and RL = 1 MΩ.(1)
PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT
VOS Input Offset Voltage TA = 25°C 1.5 2.8 mV
At the temperature extremes 3
TC VOS Input Offset Average Drift 0.15 μV/°C
IB Input Bias Current TA = 25°C 36 80 nA
At the temperature extremes 85
IOS Input Offset Current 0.2 nA
CMRR Common-Mode Rejection Ratio 0 V ≤ VCM ≤ 1.8 V TA = 25°C 82 93 dB
At the temperature extremes 80
PSRR Power Supply Rejection Ratio 1 V ≤ V+ ≤ 1.8V, VCM = 0.5 V TA = 25°C 70 92 dB
At the temperature extremes 67
1 V ≤ V+ ≤ 3 V, VCM = 0.5 V TA = 25°C 68 85
At the temperature extremes 65
VCM Input Common-Mode Voltage Range CMRR ≥ 82 dB –0.2 2 V
CMRR ≥ 80 dB At the temperature extremes –0.2 2
AV Large Signal Voltage Gain VOUT = 0.2 to 1.6 V
RL = 600 Ω to 0.9 V		 TA = 25°C 86 110 dB
At the temperature extremes 83
VOUT = 0.2 to 1.6 V
RL = 2 kΩ to 0.9 V		 TA = 25°C 86 116
At the temperature extremes 83
VOUT Output Voltage Swing High RL = 600 Ω to 0.9 V TA = 25°C 50 33 mV from
rail
At the temperature extremes 60
RL = 2 kΩ to 0.9 V TA = 25°C 25 13
At the temperature extremes 34
Output Voltage Swing Low RL = 600 Ω to 0.9 V TA = 25°C 80 54
At the temperature extremes 105
RL = 2 kΩ to 0.9 V TA = 25°C 35 17
At the temperature extremes 44
IOUT Output Short-Circuit Current (4) Sourcing
VO = 0 V, VIN(DIFF) = ±0.2 V		 TA = 25°C 50 85 mA
At the temperature extremes 35
Sinking
VO = 1.8 V, VIN(DIFF) = ±0.2 V		 TA = 25°C 45 80
At the temperature extremes 25
IS Supply Current Active Mode VSD <0.5 V TA = 25°C 570 780 μA
At the temperature extremes 880
Shutdown Mode VSD >1.3 V TA = 25°C 0.3 2.2
At the temperature extremes 10
SR Slew Rate See (5) 1.4 V/μs
GBWP Gain Bandwidth Product 2.8 MHz
en Input-Referred Voltage Noise f = 1 kHz 25 nV/√Hz
in Input-Referred Current Noise f = 1 kHz 0.2 pA/Hz
THD Total Harmonic Distortion f = 1 kHz, AV = 1, RL = 1 kΩ 0.02%
ISD Shutdown Pin Current Active Mode, VSD = 0 V .001 1 µA
Shutdown Mode, VSD = 1.8 V .001 1
VSD Shutdown Pin Voltage Range Active Mode 0 0.5 V
Shutdown Mode 1.45 1.8
(1) Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions is very limited self-heating of the device.
(2) All limits are specified by testing or statistical analysis.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(4) The short-circuit test is a momentary test, the short-circuit duration is 1.5 ms.
(5) Number specified is the average of the positive and negative slew rates.

6.7 Typical Characteristics

Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 1 V, V− = 0 V, VCM = V+/2 = VO.
LMV951 20123105.gif Figure 1. Supply Current vs Supply Voltage
LMV951 20123107.gif Figure 3. Supply Current vs Shutdown Voltage
LMV951 20123109.gif Figure 5. Supply Current vs Shutdown Voltage
LMV951 20123111.gif Figure 7. VOS vs VCM
LMV951 20123113.gif Figure 9. VOS vs Supply Voltage
LMV951 20123152.gif Figure 11. IBIAS vs VCM
LMV951 20123114.gif Figure 13. Sourcing Current vs Supply Voltage
LMV951 20123116.gif Figure 15. Sourcing Current vs Output Voltage
LMV951 20123118.gif Figure 17. Sourcing Current vs Output Voltage
LMV951 20123120.gif Figure 19. Sourcing Current vs Output Voltage
LMV951 20123123.gif Figure 21. Positive Output Swing vs Supply Voltage
LMV951 20123125.gif Figure 23. Positive Output Swing vs Supply Voltage
LMV951 20123126.gif Figure 25. Open Loop Gain and Phase With Capacitive Load
LMV951 20123128.gif Figure 27. Open Loop Gain and Phase With Capacitive Load
LMV951 20123130.gif Figure 29. Open Loop Gain and Phase With Capacitive Load
LMV951 20123132.gif Figure 31. Small Signal Transient Response, AV = +1
LMV951 20123134.gif Figure 33. Small Signal Transient Response, AV = +1
LMV951 20123136.gif Figure 35. Small Signal Transient Response, AV = +1
LMV951 20123138.gif Figure 37. Phase Margin vs Capacitive Load (Stability)
LMV951 20123140.gif Figure 39. Phase Margin vs Capacitive Load (Stability)
LMV951 20123142.gif Figure 41. CMRR vs Frequency
LMV951 20123147.gif Figure 43. THD+N vs Frequency
LMV951 20123149.gif Figure 45. THD+N vs Frequency
LMV951 20123106.gif Figure 2. Supply Current vs Supply Voltage in Shutdown Mode
LMV951 20123108.gif Figure 4. Supply Current vs Shutdown Voltage
LMV951 20123110.gif Figure 6. VOS vs VCM
LMV951 20123112.gif Figure 8. VOS vs VCM
LMV951 20123151.gif Figure 10. IBIAS vs VCM
LMV951 20123153.gif Figure 12. IBIAS vs VCM
LMV951 20123115.gif Figure 14. Sinking Current vs Supply Voltage
LMV951 20123117.gif Figure 16. Sinking Current vs Output Voltage
LMV951 20123119.gif Figure 18. Sinking Current vs Output Voltage
LMV951 20123121.gif Figure 20. Sinking Current vs Output Voltage
LMV951 20123122.gif Figure 22. Negative Output Swing vs Supply Voltage
LMV951 20123124.gif Figure 24. Negative Output Swing vs Supply Voltage
LMV951 20123127.gif Figure 26. Open Loop Gain and Phase With Resistive Load
LMV951 20123129.gif Figure 28. Open Loop Gain and Phase With Resistive Load
LMV951 20123131.gif Figure 30. Open Loop Gain and Phase With Resistive Load
LMV951 20123133.gif Figure 32. Large Signal Transient Response, AV = +1
LMV951 20123135.gif Figure 34. Large Signal Transient Response, AV = +1
LMV951 20123137.gif Figure 36. Large Signal Transient Response, AV = +1
LMV951 20123139.gif Figure 38. Phase Margin vs Capacitive Load (Stability)
LMV951 20123141.gif Figure 40. PSRR vs Frequency
LMV951 20123143.gif Figure 42. Input Referenced Voltage Noise vs Frequency
LMV951 20123148.gif Figure 44. THD+N vs Frequency
LMV951 20123155.gif Figure 46. Closed Loop Output Impedance vs Frequency