JAJSER9C December   2017  – March 2023 LMZM23601

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
    1.     Device Comparison
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Scheme
      2. 7.3.2 Soft-Start Function
      3. 7.3.3 Enable and External UVLO Function
      4. 7.3.4 Current Limit
      5. 7.3.5 Hiccup Mode
      6. 7.3.6 Power Good (PGOOD) Function
      7. 7.3.7 MODE/SYNC Function
        1. 7.3.7.1 Forced PWM Mode
        2. 7.3.7.2 Auto PFM Mode
        3. 7.3.7.3 Dropout Mode
        4. 7.3.7.4 SYNC Operation
      8. 7.3.8 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
      2. 7.4.2 FPWM Operation
      3. 7.4.3 Auto PFM Mode Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Maximum Input Voltage for VOUT < 2.5 V
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Input Capacitor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Feedback Voltage Divider for Adjustable Output Voltage Versions
        5. 8.2.2.5 RPU - PGOOD Pullup Resistor
        6. 8.2.2.6 VIN Divider and Enable
      3. 8.2.3 Application Curves
        1. 8.2.3.1 VOUT = 5 V
        2. 8.2.3.2 VOUT = 3.3 V
        3. 8.2.3.3 VOUT = 12 V
        4. 8.2.3.4 VOUT = 15 V
        5. 8.2.3.5 VOUT = 2.5 V
        6. 8.2.3.6 VOUT = 1.2 V and VOUT = 1.8 V
        7. 8.2.3.7 VOUT = 5 V and 3.3 V Fixed Output Options
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Supply Voltage Range
      2. 8.4.2 Supply Current Capability
      3. 8.4.3 Supply Input Connections
        1. 8.4.3.1 Voltage Drops
        2. 8.4.3.2 Stability
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Thermal Design
      2. 8.5.2 Layout Examples
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • SIL|10
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

GUID-2E8D6A6C-E2EB-4580-934D-7D49200EFDA9-low.svg Figure 5-1 SIL 10-Pin MicroSiP™ Package Top View
Table 5-1 Pin Functions
PIN TYPE DESCRIPTION
NO. NAME
1 GND G Ground for all circuitry. Reference point for all voltages.
2 MODE/SYNC I This pin is a multifunction mode control input which is tolerant of voltages up to the input voltage.
With this input tied LOW, the device is in Auto PFM mode with automatic transition between PFM and PWM with diode emulation at light load. TI recommends this mode when the application requires high efficiency at light load.
With this input tied HIGH, the device is in forced PWM mode. The device switches at the internal clock frequency. TI recommends this mode when the application requires constant switching frequency across the entire load current.
With a valid synchronization signal at this pin, the device switches in forced PWM mode at the external clock frequency and synchronized with it at the rising edge of the clock.
Do not float this pin.
3 VIN P Input supply to the regulator. Connect a high-quality bypass capacitors directly to this pin and the GND pin (pin 1).
4 EN I Enable input to the regulator. HIGH = ON, LOW = OFF. This pin can be connected to VIN. Do not float.
5 PGOOD O Open-drain, power-good output. Connect to a suitable voltage supply through a current limiting resistor. HIGH = power is good, LOW = fault. This output terminal is LOW when EN is LOW.
6 VOUT O Output voltage terminal. This pin is internally connected to one terminal of the integrated inductor. Connect an output filter capacitor from VOUT to GND and place the capacitor as close as possible to the VOUT pin.
7 FB I Feedback input to the regulator.
If using the fixed 3.3-V or 5-V options of the device, connect this pin to the positive end of the output filter capacitor (the VOUT node).
If using the adjustable output option of the device connect this to the feedback voltage divider and keep this node as small as possible on the board layout.
8 DNC O Do not connect. Leave floating. This pin provides access to the internal VCC voltage of the device.
9 DNC O Do not connect. Leave floating. This pin provides access to the internal BOOT voltage for the high side MOSFET driver.
10 DNC O Do not connect. Leave floating. This pin provides access to the internal SW voltage of the device.
Thermal Pad — G This terminal is internally connected to GND and provides a wide thermal connection from the IC to the PCB. Connect to electrical ground plane for adequate heat sinking.
G = Ground, I = Input, O = Output, P = Power