JAJSFO4 データシート

JAJSFO4B August 2017 – December 2018 OPA2810

PRODUCTION DATA.

at V_O= 2 V_PP, R_F = 1 kΩ, R_L = 1 kΩ and T_A ≈ 25°C (unless otherwise noted)

Simulated with no output load

Figure 44. Open-Loop Gain and Phase vs Frequency

See Figure 65, Gain = 2 V/V

Figure 46. Large-Signal Response vs Supply Voltage

See Figure 66, Gain = –1 V/V

Figure 48. Harmonic Distortion vs Frequency vs Supply Voltage

Measured then fit to ideal 1/f model

Figure 50. Auxiliary Input Stage Voltage Noise Density vs Frequency

See Figure 65 (simulation)

Figure 52. Closed-Loop Output Impedance vs Frequency

Simulated Curves, V_S = 5 V and 10 V

Figure 54. Power Supply Rejection Ratio vs Frequency

V_S = ±12-V

Figure 56. Input Bias Current vs Input Common-Mode Voltage

70 units, DGK package

Figure 58. Quiescent Current vs Ambient Temperature

Input offset voltage (µV), 1246 units

Figure 60. Input Offset Voltage Distribution

See Figure 65, Gain = 1 V/V, R_F = 0 Ω

Figure 45. Large-Signal Response vs Supply Voltage

See Figure 65, Gain = 2 V/V

Figure 47. Harmonic Distortion vs Frequency vs Supply Voltage

Measured then fit to ideal 1/f model

Figure 49. Input Voltage Noise Density vs Frequency

See Figure 65, Gain = 1 V/V, R_F = 0 Ω

Figure 51. Crosstalk vs Frequency

Simulated curves

Figure 53. Common-Mode Rejection Ratio vs Frequency

Simulated curves, V_S = 24 V

Figure 55. Power Supply Rejection Ratio vs Frequency

Abs (V_{IN,Diff (max)}) = V_S when V_S < 7 V

Figure 57. Input Bias Current vs Differential Input Voltage

70 units, DGK package

Figure 59. Input Offset Voltage vs Ambient Temperature

Input offset voltage drift (µV/°C), –40°C to +125°C fit, 70 units

Figure 61. Input Offset Voltage Drift Distribution