JAJSFG2I December   2013  – May 2018 OPA172 , OPA2172 , OPA4172

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      JFET入力の低ノイズ・アンプ
      2.      優れたTHD性能
  4. 改訂履歴
  5. 概要(続き)
  6. Device Comparison
    1. 6.1 Device Comparison
    2. 6.2 Device Family Comparison
  7. Pin Configuration and Functions
    1.     Pin Functions: OPA172
    2.     Pin Functions: OPA2172 and OPA4172
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information: OPA172
    5. 8.5 Thermal Information: OPA2172
    6. 8.6 Thermal Information: OPA4172
    7. 8.7 Electrical Characteristics
    8. 8.8 Typical Characteristics: Table of Graphs
    9. 8.9 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 EMI Rejection
      2. 9.3.2 Phase-Reversal Protection
      3. 9.3.3 Capacitive Load and Stability
    4. 9.4 Device Functional Modes
      1. 9.4.1 Common-Mode Voltage Range
      2. 9.4.2 Electrical Overstress
      3. 9.4.3 Overload Recovery
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Capacitive Load Drive Solution Using an Isolation Resistor
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Bidirectional Current Source
      3. 10.2.3 JFET-Input Low-Noise Amplifier
  11. 11Power-Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 開発サポート
        1. 13.1.1.1 TINA-TI(無料のダウンロード・ソフトウェア)
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 関連リンク
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

At VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF, unless otherwise noted.
OPA172 OPA2172 OPA4172 C016_OT_SBOS618.png
Figure 1. Offset Voltage Production Distribution
OPA172 OPA2172 OPA4172 C001_OT_SBOS618.png
Figure 3. Offset Voltage vs Temperature
(VS = ±18 V)
OPA172 OPA2172 OPA4172 C017_OT_SBOS618.png
Figure 5. Offset Voltage vs Common-Mode Voltage
(Upper Stage)
OPA172 OPA2172 OPA4172 C013_OT_SBOS618.png
Figure 7. Input Bias Current vs Common-Mode Voltage
OPA172 OPA2172 OPA4172 C011_OT_SBOS618.png
Figure 9. Output Voltage Swing vs Output Current (Maximum Supply)
OPA172 OPA2172 OPA4172 C007_OT_SBOS618.png
Figure 11. CMRR vs Temperature
OPA172 OPA2172 OPA4172 C001_SBOS618.png
Figure 13. 0.1-Hz to 10-Hz Noise
OPA172 OPA2172 OPA4172 C008_SBOS618.png
Figure 15. THD+N Ratio vs Frequency
OPA172 OPA2172 OPA4172 C009_OT_SBOS618.png
Figure 17. Quiescent Current vs Temperature
OPA172 OPA2172 OPA4172 C004_SBOS618.png
Figure 19. Open-Loop Gain and Phase vs Frequency
OPA172 OPA2172 OPA4172 C008_OT_SBOS618.png
Figure 21. Open-Loop Gain vs Temperature
OPA172 OPA2172 OPA4172 C022_SBOS618.png
Figure 23. Small-Signal Overshoot vs Capacitive Load
(100-mV Output Step)
OPA172 OPA2172 OPA4172 C011_SBOS618.png
Figure 25. Positive Overload Recovery
OPA172 OPA2172 OPA4172 C013_SBOS618.png
Figure 27. Negative Overload Recovery
OPA172 OPA2172 OPA4172 C007_SBOS618.png
Figure 29. Small-Signal Step Response (10 mV, G = –1)
OPA172 OPA2172 OPA4172 C006_SBOS618.png
Figure 31. Small-Signal Step Response (100 mV, G = –1)
OPA172 OPA2172 OPA4172 C005_SBOS618.png
Figure 33. Large-Signal Step Response (10 V, G = –1)
OPA172 OPA2172 OPA4172 C024_SBOS618.png
Figure 35. Large-Signal Settling Time (10-V Positive Step)
OPA172 OPA2172 OPA4172 C014_SBOS618.png
Figure 37. No Phase Reversal
OPA172 OPA2172 OPA4172 C023_SBOS618.png
Figure 39. Maximum Output Voltage vs Frequency
OPA172 OPA2172 OPA4172 C041_SBOS618.png
Figure 41. Channel Separation vs Frequency
OPA172 OPA2172 OPA4172 C015_OT_SBOS618.png
Figure 2. Offset Voltage Drift Production Distribution
OPA172 OPA2172 OPA4172 C002_OT_SBOS618.png
Figure 4. Offset Voltage vs Common-Mode Voltage
(VS = ±18 V)
OPA172 OPA2172 OPA4172 C005_OT_SBOS618.png
Figure 6. Offset Voltage vs Power Supply
OPA172 OPA2172 OPA4172 C012_OT_SBOS618.png
Figure 8. Input Bias Current vs Temperature
OPA172 OPA2172 OPA4172 C015_SBOS618.png
Figure 10. CMRR and PSRR vs Frequency
(Referred-To-Input)
OPA172 OPA2172 OPA4172 C006_OT_SBOS618.png
Figure 12. PSRR vs Temperature
OPA172 OPA2172 OPA4172 C002_SBOS618.png
Figure 14. Input Voltage Noise Spectral Density vs Frequency
OPA172 OPA2172 OPA4172 C009_SBOS618.png
Figure 16. THD+N vs Output Amplitude
OPA172 OPA2172 OPA4172 C010_OT_SBOS618.png
Figure 18. Quiescent Current vs Supply Voltage
OPA172 OPA2172 OPA4172 C003_SBOS618.png
Figure 20. Closed-Loop Gain vs Frequency
OPA172 OPA2172 OPA4172 C019_SBOS618.png
Figure 22. Open-Loop Output Impedance vs Frequency
OPA172 OPA2172 OPA4172 C021_SBOS618.png
Figure 24. Small-Signal Overshoot vs Capacitive Load
(100-mV Output Step)
OPA172 OPA2172 OPA4172 C010_SBOS618.png
Figure 26. Positive Overload Recovery (Zoomed In)
OPA172 OPA2172 OPA4172 C012_SBOS618.png
Figure 28. Negative Overload Recovery (Zoomed In)
OPA172 OPA2172 OPA4172 C018_SBOS618.png
Figure 30. Small-Signal Step Response (10 mV, G = +1)
OPA172 OPA2172 OPA4172 C017_SBOS618.png
Figure 32. Small-Signal Step Response (100 mV, G = +1)
OPA172 OPA2172 OPA4172 C016_SBOS618.png
Figure 34. Large-Signal Step Response (10 V, G = +1)
OPA172 OPA2172 OPA4172 C025_SBOS618.png
Figure 36. Large-Signal Settling Time (10-V Negative Step)
OPA172 OPA2172 OPA4172 C014_OT_SBOS618.png
Figure 38. Short-Circuit Current vs Temperature
OPA172 OPA2172 OPA4172 C020_SBOS618.png
Figure 40. EMIRR vs Frequency