JAJSNM7 December   2021 REF35

ADVANCE INFORMATION  

  1. 特長
  2. アプリケーション
  3. 説明
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Solder Heat Shift
    2. 8.2 Temperature Coefficient
    3. 8.3 Long-Term Stability
    4. 8.4 Thermal Hysteresis
    5. 8.5 Noise Performance
      1. 8.5.1 Low Frequency (1/f) Noise
      2. 8.5.2 Broadband Noise
    6. 8.6 Power Dissipation
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Supply Voltage
      2. 9.3.2 EN Pin
      3. 9.3.3 NR Pin
    4. 9.4 Device Functional Modes
      1. 9.4.1 Basic Connections
      2. 9.4.2 スタートアップ
      3. 9.4.3 出力過渡動作
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application: Negative Reference Voltage
    3. 10.3 Typical Application: Precision Power Supply and Reference
      1. 10.3.1 Design Requirements
      2. 10.3.2 Detailed Design Procedure
        1. 10.3.2.1 リファレンスの選択
        2. 10.3.2.2 Input and Output Capacitors
        3. 10.3.2.3 Selection of ADC
      3. 10.3.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Layout Guidelines

Figure 12-1 illustrates an example of a PCB layout for a data acquisition system using the REF35. Some key considerations are:

  • Connect low-ESR, 0.1-μF ceramic bypass capacitors at VIN, VREF of the REF35.
  • Decouple other active devices in the system per the device specifications.
  • Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup.
  • Place the external components as close to the device as possible. This configuration prevents parasitic errors (such as the Seebeck effect) from occurring.
  • Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when absolutely necessary.

Figure 12-2 illustrates pin compatibility with TI REF30xx, REF31xx and REF33xx series references in SOT23-3 package when using REF35xxx family footprint. Key is to rotate the REF30xx, REF31xx and REF33xx reference devices by 180º before assembly.