Figure 12-1 illustrates an example of a PCB layout for a data acquisition system using the REF35. Some key considerations are:
- Connect low-ESR, 0.1-μF ceramic bypass capacitors at VIN, VREF of the REF35.
- Decouple other active devices in the system per the device specifications.
- Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup.
- Place the external components as close to the device as possible. This configuration prevents parasitic errors (such as the Seebeck effect) from occurring.
- Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when absolutely necessary.
Figure 12-2 illustrates pin compatibility with TI REF30xx, REF31xx and REF33xx series references in
SOT23-3 package when using REF35xxx family footprint. Key is to rotate the REF30xx, REF31xx
and REF33xx reference devices by 180º before assembly.