JAJSC93E June 2016 – December 2017 TAS2560
The TAS2560 requires four power supplies:
The decoupling capacitors for the power supplies should be placed close to the device terminals. For VBAT, IOVDD, and VDD, a small decoupling capacitor of 0.1 µF should be placed as close as possible to the device terminals. Refer to Figure 100 for the schematic.
The following power sequence should be followed for power up and power down. If the recommended sequence is not followed there can be large current in device due to faults in level shifters and diodes becoming forward biased. The Tdelay between power supplies should be large enough for the power rails to settle.
When the supplies have settled, the RESETZ terminal can be set HIGH to operate the device. Additionally the RESETZ pin can be tied to IOVDD and the internal DVDD POR will perform a reset of the device. After a hardware or software reset additional commands to the device should be delayed for 100uS to allow the OTP to load. The above sequence should be completed before any I2C operation.
The boost supply (VBAT) and associated passives need to be able to support the current requirements of the device. By default, the peak current limit of the boost is set to 3 A. Refer to Configurable Boost Current Limit (ILIM) for information on changing the current limit. A minimum of a 10 µF capacitor is recommended on the boost supply to quickly support changes in required current. Refer to for the schematic.
The current requirements can also be reduced by lowering the gain of the amplifier, or in response to decreasing battery through the use of the battery-tracking AGC feature of the TAS2560 described in Battery Guard AGC.