JAJSO44 june   2023 TMUX582F-SEP

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics (Global)
    6. 6.6 Dual Supply: Electrical Characteristics
    7. 6.7 Single Supply: Electrical Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  Input and Output Leakage Current Under Overvoltage Fault
    5. 7.5  Break-Before-Make Delay
    6. 7.6  Enable Delay Time
    7. 7.7  Transition Time
    8. 7.8  Fault Response Time
    9. 7.9  Fault Recovery Time
    10. 7.10 Fault Flag Response Time
    11. 7.11 Fault Flag Recovery Time
    12. 7.12 Charge Injection
    13. 7.13 Off Isolation
    14. 7.14 Crosstalk
    15. 7.15 Bandwidth
    16. 7.16 THD + Noise
  9. 8 Truth Table
  10. 9 Detailed Description
    1. 9.1 Functional Block Diagram
    2. 9.2 Feature Description
      1. 9.2.1 Flat ON- Resistance
      2. 9.2.2 Protection Features
        1. 9.2.2.1 Input Voltage Tolerance
        2. 9.2.2.2 Powered-Off Protection
        3. 9.2.2.3 Fail-Safe Logic
        4. 9.2.2.4 Overvoltage Protection and Detection
        5. 9.2.2.5 Adjacent Channel Operation During Fault
        6. 9.2.2.6 ESD Protection
        7. 9.2.2.7 Latch-Up Immunity
        8. 9.2.2.8 EMC Protection
      3. 9.2.3 Overvoltage Fault Flags
      4. 9.2.4 Bidirectional and Rail-to-Rail Operation
      5. 9.2.5 1.8 V Logic Compatible Inputs
      6. 9.2.6 Integrated Pull-Down Resistor on Logic Pins
    3. 9.3 Device Functional Modes
      1. 9.3.1 Normal Mode
      2. 9.3.2 Fault Mode
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 System Diagnostics – Telemetry
      2. 10.2.2 Design Requirements
      3. 10.2.3 Detailed Design Procedure
      4. 10.2.4 Application Curves
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 用語集
  15. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Tape and Reel Information
    2. 14.2 Mechanical Data

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.7 Single Supply: Electrical Characteristics

VDD = +12 V ± 10%, VSS = 0 V, GND = 0 V (unless otherwise noted) 
Typical at VDD = +12 V, VSS = 0 V, TA = 25℃  (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
ANALOG SWITCH
RON On-resistance VS = 0 V to 7.8 V, IS = –1 mA –55°C to +25°C 180 Ω
–55°C to +125°C 400
ΔRON On-resistance mismatch between channels VS = 0 V to 7.8 V, IS = –1 mA –55°C to +25°C 2.5 Ω
–55°C to +125°C 13
RFLAT On-resistance flatness VS = 0 V to 7.8 V, IS = –1 mA –55°C to +25°C 7 Ω
RFLAT On-resistance flatness VS = 0 V to 7.8 V, IS = –1 mA –55°C to +125°C 80 Ω
RFLAT On-resistance flatness VS = 1 V to 7.8 V, IS = –1 mA –55°C to +25°C 1.5 Ω
–55°C to +125°C 8
RON_DRIFT On-resistance drift VS = 6 V, IS = –1 mA –55°C to +125°C 1.2 Ω/°C
IS(OFF) Source off leakage current(1) Switch state is off, VS = 1 V/ 10 V, VD = 10 V/ 1 V, VDD = 13.2 V –55°C to +25°C –1 0.1 1 nA
–55°C to +125°C –4.5 4.5
ID(OFF) Drain off leakage current(1) Switch state is off, VS = 1 V/ 10 V, VD = 10 V/ 1 V, VDD = 13.2 V –55°C to +25°C –1 0.1 1 nA
–55°C to +125°C –15 15
IS(ON), I,D(ON) Channel on leakage current Switch state is on, VS = floating, VD = 1 V/ 10 V, VDD = 13.2 –55°C to +25°C –1.5 0.3 1.5 nA
–55°C to +125°C –23 23
FAULT CONDITION
IS(FA) Input leakage current
during overvoltage		 VS = ± 60 V, GND = 0V, VDD = VFP = 13.2 V, VSS = VFN =  0 V –55°C to +125°C ±145 µA
Input leakage current
during overvoltage with
grounded supplies		 VS = ± 60 V, GND = 0V, VDD = VSS = VFP = VFN= 0 V, VEN = VAx = 0 V or floating ±135
Input leakage current
during overvoltage with
floating supplies		 VS = ± 60 V, GND = 0V, VDD = VSS = VFP = VFN= floating, VEN = VAx = 0 V or floating ±135
ID(FA) Output leakage current
during overvoltage		 VS = ± 60 V, GND = 0V, VDD = VFP = 13.2 V, VSS = VFN =  0 V –55°C to +25°C ±10 nA
–55°C to +125°C –100 100
Output leakage current
during overvoltage with
grounded supplies		 VS = ± 60 V, GND = 0V, VDD = VSS = VFP = VFN= 0 V, VEN = VAx = 0 V or floating –55°C to +25°C –50 ±1 50
–55°C to +125°C –550 550
Output leakage current
during overvoltage with
floating supplies		 VS = ± 60 V, GND = 0V, VDD = VSS = VFP = VFN= floating, VEN = VAx = 0 V or floating –55°C to +25°C ±3 µA
–55°C to +125°C ±8
DIGITAL INPUT/ OUTPUT
IIH High-level input current VEN = VAx = VDD –55°C to +125°C –2.5 ± 0.6 2.5 µA
IIL Low-level input current VEN = VAx = 0 V –55°C to +125°C –1.5 ± 0.6 1.5 µA
SWITCHING CHARACTERISTICS
tON (EN) Enable turn-on time VS = 8 V,
RL = 4 kΩ, CL= 12 pF		 –55°C to +25°C 160 ns
–55°C to +125°C 300
tOFF (EN) Enable turn-off time VS = 8 V,
RL = 4 kΩ, CL= 12 pF		 –55°C to +25°C 420 ns
–55°C to +125°C 500
tTRAN Transition time VS = 8 V,
RL = 4 kΩ, CL= 12 pF		 –55°C to +25°C 160 ns
–55°C to +125°C 240
tBBM Break-before-make time delay VS = 8 V,
RL = 4 kΩ, CL= 12 pF		 –55°C to +125°C 90 ns
tRESPONSE Fault response time VFP = 8 V, VFN = 0 V,
RL = 4 kΩ, CL= 12 pF		 –55°C to +125°C 225 ns
tRECOVERY Fault recovery time VFP = 8 V, VFN = 0 V,
RL = 4 kΩ, CL= 12 pF		 –55°C to +125°C 0.75 µs
tRESPONSE(FLAG) Fault flag response time VFP = 8 V, VFN = 0 V, VPU = 5 V,
RPU = 1 kΩ, CL= 12 pF		 25°C 120 ns
tRECOVERY(FLAG) Fault flag recovery time VFP = 8 V, VFN = 0 V, VPU = 5 V,
RPU = 1 kΩ, CL= 12 pF		 25°C 0.75 µs
QINJ Charge injection VS = 6 V, CL = 1 nF, RS = 0 Ω 25°C -11 pC
OISO Off-isolation RS = 50 Ω, RL = 50 Ω, CL = 5 pF,
VS = 200 mVRMS, VBIAS = 2 V, f = 1 MHz		 25°C –75 dB
XTALK Intra-channel crosstalk RS = 50 Ω, RL = 50 Ω, CL = 5 pF,
VS = 200 mVRMS, VBIAS = 2 V, f = 1 MHz		 25°C –90 dB
BW –3 dB bandwidth RS = 50 Ω, RL = 50 Ω, CL = 5 pF,
VS = 200 mVRMS, VBIAS = 2 V, f = 1 MHz		 25°C 130 MHz
ILOSS Insertion loss RS = 50 Ω, RL = 50 Ω, CL = 5 pF,
VS = 200 mVRMS, VBIAS = 2 V, f = 1 MHz		 25°C –9 dB
THD+N Total harmonic distortion plus noise RS = 40 Ω, RL = 10k Ω, VS = 6 VPP, VBIAS = 6 V, f = 20 Hz to 20 kHz 25°C 0.0025 %
CS(OFF) Input off-capacitance f = 1 MHz, VS = 6 V 25°C 4 pF
CD(OFF) Output off-capacitance f = 1 MHz, VS = 6 V 25°C 31 pF
CS(ON), CD(ON) Input/Output on-capacitance f = 1 MHz, VS = 6 V 25°C 34 pF
POWER SUPPLY
IDD VDD supply current VDD = VFP = 13.2 V, VSS = VFN =  0 V, VEN/ VAx = 0 V, 5 V, or VDD, VS = 6 V 25°C 0.25 mA
–55°C to +125°C 0.6
ISS VSS supply current VDD = VFP = 13.2 V, VSS = VFN =  0 V, VEN/ VAx = 0 V, 5 V, or VDD, VS = 6 V 25°C 0.15 mA
–55°C to +125°C 0.5
IGND GND current VDD = VFP = 13.2 V, VSS = VFN =  0 V, VEN/ VAx = 0 V, 5 V, or VDD, VS = 6 V 25°C 0.075 mA
IFP VFP supply current VDD = VFP = 13.2 V, VSS = VFN =  0 V, VEN/ VAx = 0 V, 5 V, or VDD, VS = 6 V 25°C 10 µA
IFN VFN supply current VDD = VFP = 13.2 V, VSS = VFN =  0 V, VEN/ VAx = 0 V, 5 V, or VDD, VS = 6 V 25°C 10 µA
IDD(FA) VDD supply current under fault VS = ± 60 V, VDD = VFP = 13.2 V, VSS = VFN =  0 V, VEN/ VAx = 0 V, 5 V, or VDD 25°C 0.25 mA
–55°C to +125°C 1.25
ISS(FA) VSS supply current under fault VS = ± 60 V, VDD = VFP = 13.2 V, VSS = VFN =  0 V, VEN/ VAx = 0 V, 5 V, or VDD 25°C 0.15 mA
–55°C to +125°C 0.75
IGND(FA) GND current under fault VS = ± 60 V, VDD = VFP = 13.2 V, VSS = VFN =  0 V, VEN/ VAx = 0 V, 5 V, or VDD 25°C 0.2 mA
IFP(FA) VFP supply current under fault VS = ± 60 V, VDD = VFP = 13.2 V, VSS = VFN =  0 V, VEN/ VAx = 0 V, 5 V, or VDD 25°C 20 µA
IFN(FA) VFN supply current under fault VS = ± 60 V, VDD = VFP = 13.2 V, VSS = VFN =  0 V, VEN/ VAx = 0 V, 5 V, or VDD 25°C 20 µA
IDD(DISABLE) VDD supply current (disable mode) VDD = VFP = 13.2 V, VSS = VFN =  0 V, VAx = 0 V, 5 V, or VDD, VEN = 0 V, VS = 0 V 25°C 0.15 mA
–55°C to +125°C 0.6
ISS(DISABLE) VSS supply current (disable mode) VDD = VFP = 13.2 V, VSS = VFN =  0 V, VAx = 0 V, 5 V, or VDD, VEN = 0 V, VS = 0 V 25°C 0.1 mA
–55°C to +125°C 0.5
(1) When VS is positive,VD is negative, and vice versa.