JAJSOD0A April   2022  – July 2022 TPS22811

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
      1.      14
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO and UVP)
      2. 7.3.2 Overvoltage Lockout (OVLO)
      3. 7.3.3 Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 7.3.3.1 Slew Rate (dVdt) and Inrush Current Control
        2. 7.3.3.2 Short-Circuit Protection
        3. 7.3.3.3 Active Current Limiting During Start-Up
      4. 7.3.4 Analog Load Current Monitor
      5. 7.3.5 Overtemperature Protection (OTP)
      6. 7.3.6 Fault Response
      7. 7.3.7 Power-Good Indication (PG)
      8. 7.3.8 Quick Output Discharge (QOD)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single Device, Self-Controlled
      2. 8.1.2 Parallel Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting Undervoltage and Overvoltage Thresholds
        2. 8.2.2.2 Setting Output Voltage Rise Time (tR)
        3. 8.2.2.3 Setting Power-Good Assertion Threshold
        4. 8.2.2.4 Setting Analog Current Monitor Voltage (IMON) Range
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Transient Protection
    2. 9.2 Output Short-Circuit Measurements
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.2 Setting Output Voltage Rise Time (tR)

For a successful design, the junction temperature of device must be kept below the absolute maximum rating during both dynamic (start-up) and steady-state conditions. Dynamic power stresses often are an order of magnitude greater than the static stresses, so it is important to determine the right start-up time and inrush current limit required with system capacitance to avoid thermal shutdown during start-up.

The slew rate (SR) needed to achieve the desired output rise time can be calculated as:

Equation 9. S R   V m s = V I N   V t R   m s =   12   V 12   m s = 1   V m s  

The CdVdt needed to achieve this slew rate can be calculated as:

Equation 10. CdVdt pF=3300SR Vms=33001 Vms =3300 pF

Choose the nearest standard capacitor value as 3300 pF.

For this slew rate, the inrush current can be calculated as:

Equation 11. I I N R U S H   m A = C O U T   µ F   × S R   V m s =   470   µ F   ×   1   V m s   = 470   m A

The average power dissipation inside the part during inrush can be calculated as:

Equation 12. P D I N R U S H   = 0.5   ×   V I N   V   ×   I I N R U S H   m A =   0.5   × 12   V × 470   m A = 2.82   W
For the given power dissipation, the thermal shutdown time of the device must be greater than the ramp-up time tR to avoid start-up failure. Figure 8-7 shows the thermal shutdown limit, for 2.82 W of power, the shutdown time is more than 10 s which is very large as compared to tR = 12 ms. Therefore, it is safe to use 12 ms as the start-up time for this application.
Figure 8-7 Thermal Shutdown Plot During Inrush