JAJSDK1B May   2017  – March 2018 TPS543B20

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1  Soft-Start Operation
      2. 8.4.2  Input and VDD Undervoltage Lockout (UVLO) Protection
      3. 8.4.3  Power Good and Enable
      4. 8.4.4  Voltage Reference
      5. 8.4.5  Prebiased Output Start-up
      6. 8.4.6  Internal Ramp Generator
        1. 8.4.6.1 Ramp Selections
      7. 8.4.7  Switching Frequency
      8. 8.4.8  Clock Sync Point Selection
      9. 8.4.9  Synchronization and Stackable Configuration
      10. 8.4.10 Dual-Phase Stackable Configurations
        1. 8.4.10.1 Configuration 1: Master Sync Out Clock-to-Slave
        2. 8.4.10.2 Configuration 2: Master and Slave Sync to External System Clock
      11. 8.4.11 Operation Mode
      12. 8.4.12 API/BODY Brake
      13. 8.4.13 Sense and Overcurrent Protection
        1. 8.4.13.1 Low-Side MOSFET Overcurrent Protection
        2. 8.4.13.2 High-Side MOSFET Overcurrent Protection
      14. 8.4.14 Output Overvoltage and Undervoltage Protection
      15. 8.4.15 Overtemperature Protection
      16. 8.4.16 RSP/RSN Remote Sense Function
      17. 8.4.17 Current Sharing
      18. 8.4.18 Loss of Synchronization
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: TPS543B20 Stand-alone Device
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Switching Frequency Selection
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Input Capacitor Selection
        5. 9.2.2.5 Bootstrap Capacitor Selection
        6. 9.2.2.6 BP Pin
        7. 9.2.2.7 R-C Snubber and VIN Pin High-Frequency Bypass
        8. 9.2.2.8 Output Capacitor Selection
          1. 9.2.2.8.1 Response to a Load Transient
          2. 9.2.2.8.2 Ramp Selection Design to Ensure Stability
      3. 9.2.3 Application Curves
    3. 9.3 System Example
      1. 9.3.1 Two-Phase Stackable
        1. 9.3.1.1 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Package Size, Efficiency and Thermal Performance
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
        1. 12.1.1.1 WEBENCH®ツールによるカスタム設計
      2. 12.1.2 ドキュメントのサポート
        1. 12.1.2.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.6 Typical Characteristics

TPS543B20 D002_SLUSCR1.gif
VIN = 5 V 500 kHz 25°C
Figure 1. Efficiency vs Output Current
TPS543B20 D003_SLUSCR1.gif
VIN = 12 V 500 kHz 25°C
Figure 3. Efficiency vs Output Current
TPS543B20 D001_SLUSCR1.gif
500 MHz 25°C
Figure 5. Output Current vs Output Voltage
TPS543B20 sluscr1_figure_7_tps543b20.gif
VIN = 12 V 10 A to 20 A to 10 A 10-A Step at 40 A/μs
500 kHz VOUT = 900 mV
Figure 7. Output Voltage Transient Response
TPS543B20 sluscr1_figure_9_tps543b20.gif
VIN = 12 V VOUT = 900 mV 20 A Load
500 kHz
Figure 9. Output Voltage Ripple at Steady State
TPS543B20 sluscr1_figure_11_tps543b20.gif
VIN = 12 V VOUT = 900 mV 20 A Load
500 kHz
Figure 11. Start-Up From EN
TPS543B20 D004_SLUSCR1.gif
VIN = 5 V 500 kHz 25°C
Figure 2. Power Loss vs Output Current
TPS543B20 D005_SLUSCR1.gif
VIN = 12 V 500 kHz 25°C
Figure 4. Power Loss vs Output Current
TPS543B20 D006_SLUSCR1.gif
25°C
Figure 6. Switching Frequency vs Output Current
TPS543B20 sluscr1_figure_8_tps543b20.gif
VIN = 12 V VOUT = 900 mV 0 A Load
500 kHz
Figure 8. Output Voltage Ripple at Steady State
TPS543B20 sluscr1_figure_10_tps543b20.gif
VIN = 12 V VOUT = 900 mV 50 mA Load
500 kHz
Figure 10. Startup From EN
TPS543B20 sluscr1_figure_12_tps543b20.gif
Figure 12. Output Voltage Start-Up and Shutdown