JAJSGN3C December   2018  – December 2022 TPS7A25

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  7. 7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Output Enable
      2. 8.3.2 Dropout Voltage
      3. 8.3.3 Current Limit
      4. 8.3.4 Undervoltage Lockout (UVLO)
      5. 8.3.5 Thermal Shutdown
      6. 8.3.6 Power Good
      7. 8.3.7 Active Overshoot Pulldown Circuitry
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Functional Mode Comparison
      2. 8.4.2 Normal Operation
      3. 8.4.3 Dropout Operation
      4. 8.4.4 Disabled
        1.       Application and Implementation
          1. 9.1 Application Information
            1. 9.1.1 Adjustable Device Feedback Resistors
            2. 9.1.2 Recommended Capacitor Types
            3. 9.1.3 Input and Output Capacitor Requirements
            4. 9.1.4 Reverse Current
            5. 9.1.5 Feed-Forward Capacitor (CFF)
            6. 9.1.6 Power Dissipation (PD)
            7. 9.1.7 Estimating Junction Temperature
            8. 9.1.8 Special Consideration for Line Transients
          2. 9.2 Typical Application
            1. 9.2.1 Design Requirements
            2. 9.2.2 Detailed Design Procedure
              1. 9.2.2.1 Transient Response
              2. 9.2.2.2 Selecting Feedback Divider Resistors
              3. 9.2.2.3 Thermal Dissipation
            3. 9.2.3 Application Curve
          3. 9.3 Power Supply Recommendations
          4. 9.4 Layout
            1. 9.4.1 Layout Guidelines
            2. 9.4.2 Layout Examples
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DRV|6
サーマルパッド・メカニカル・データ
発注情報

8.3.7 Active Overshoot Pulldown Circuitry

This device has pulldown circuitry connected to VOUT. This circuitry is a 100-μA current sink, in series with a 5.5-kΩ resistor, controlled by VEN. When VEN is below VEN(LOW), the pulldown circuitry is disabled and the LDO output is in high-impedance mode.

If the output voltage is more than 60 mV above nominal voltage when VEN ≥ VEN(LOW), the pulldown circuitry turns on and the output is pulled down until the output voltage is within 60 mV from the nominal voltage. This feature helps reduce overshoot during the transient response.