JAJSHA0E August   2011  – Oct 2019 TS3DS10224

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      機能ブロック図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Differential 1:4 or 2‑Channel 1:2 Configurations
    6. 7.6  Electrical Characteristics: Fan-Out 1:2 Configurations
    7. 7.7  Switching Characteristics: Differential 1:4 or 2‑Channel 1:2 Configurations
    8. 7.8  Switching Characteristics: Fan-Out 1:2 Configurations
    9. 7.9  Dynamic Characteristics: Differential 1:4 or 2‑Channel 1:2 Configurations
    10. 7.10 Dynamic Characteristics: Fan-Out 1:2 Configurations
    11. 7.11 Typical Characteristics
      1. 7.11.1 Single-Channel 1:4 or Dual-Channel 1:2 Configurations
      2. 7.11.2 Fan-Out 1:2 Configurations
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Fail-Safe Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Enable and Disable
      2. 9.4.2 Differential Crosspoint Switch
      3. 9.4.3 2-Channel 1:2 Mux
      4. 9.4.4 1-Channel 1:4 Mux
      5. 9.4.5 Fan-Out 1:2 Configuration
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 1-Channel Differential 1:4 Mux
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
      2. 10.2.2 2-Channel Differential Crosspoint Switch
        1. 10.2.2.1 Design Requirements
      3. 10.2.3 Fan-Out Switch
        1. 10.2.3.1 Design Requirements
      4. 10.2.4 2-Channel Differential 1:2 SPDT Switch
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントのサポート
      1. 13.1.1 関連資料
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RUK|20
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

RUK Package
20-Pin WQFN
Top View

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 INA+ I/O A channel signal path
2 INA– I/O A channel signal path
3 INB+ I/O B channel signal path
4 INB– I/O B channel signal path
5 GND — Ground
6 OUTB1+ I/O B channel signal path
7 OUTB1– I/O B channel signal path
8 OUTB0+ I/O B channel signal path
9 OUTB0– I/O B channel signal path
10 ENB I Enable B channel: LOW = disables channel B and places the signal path in high impedance state,
HIGH = enables channel B.
11 SBO I Select B channel output, controls output selection: LOW = selects OUTB0 signals,
HIGH = selects OUTB1 signals.
12 SBI I Select B channel input, controls input selection: LOW = selects INA signals to pass through the B channel,
HIGH = selects INB signals to pass through the B channel.
13 VCC — Power supply
14 SAI I Select A channel input, controls input selection: LOW = selects INB signals to pass through the A channel,
HIGH = selects INA signals to pass through the A channel.
15 SAO I Select A channel output, controls output selection: LOW = selects OUTA0 signals,
HIGH = selects OUTA1 signals.
16 ENA I Enable A channel: LOW = disables channel A and places the signal path in high impedance state,
HIGH = enables channel A.
17 OUTA0– I/O A channel signal path
18 OUTA0+ I/O A channel signal path
19 OUTA1– I/O A channel signal path
20 OUTA1+ I/O A channel signal path