JAJSPV3B february   2023  – june 2023 UCC14141-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Insulation Specifications
    6. 7.6  Safety-Related Certifications
    7. 7.7  Electrical Characteristics
    8. 7.8  Safety Limiting Values
    9. 7.9  Insulation Characteristics
    10. 7.10 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Stage Operation
        1. 8.3.1.1 VDD-VEE Voltage Regulation
        2. 8.3.1.2 COM-VEE Voltage Regulation
        3. 8.3.1.3 Power Handling Capability
      2. 8.3.2 Output Voltage Soft Start
      3. 8.3.3 ENA and PG
      4. 8.3.4 Protection Functions
        1. 8.3.4.1 Input Undervoltage Lockout
        2. 8.3.4.2 Input Overvoltage Lockout
        3. 8.3.4.3 Output Undervoltage Protection
        4. 8.3.4.4 Output Overvoltage Protection
        5. 8.3.4.5 Overpower Protection
        6. 8.3.4.6 Overtemperature Protection
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Capacitor Selection
        2. 9.2.2.2 Single RLIM Resistor Selection
        3. 9.2.2.3 RDR Circuit Component Selection
    3. 9.3 System Examples
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.2.2.3 RDR Circuit Component Selection

RLIM1 value is chosen by Equation 15. RLIM2 value is chosen by

Equation 14. RLIM2=VCOM-VEE-0.5VCOM-VEE∙(1RLIM_MAX_L-1RLIM_MAX_H)

where RLIM_MAX_L is the smallest value between RLIM_MAX_L1 and RLIM_MAX_L2 in the Single RLIM Resistor Selection Section, and 0.5V represents the diode forward voltage drop of DLIM.

When the calculated RLIM1 and RLIM2 values have large enough difference, the RDR improvement on efficiency will be significant. If RLIM1 and RLIM2 values are close, then single RLIM resistor can be considered to reduce the external components.

The power loss of RLIM1 can be derived as

Equation 15. P R L I M 1 = V V D D - C O M 2 R L I M 1 D u t y R L I M + ( I S I N K × V C O M - V E E × R L I M 2 V C O M - V E E × R L I M 2 + ( V C O M - V E E - 0.5 ) × R L I M 1 ) 2 × R L I M 1

where

Equation 16. I S I N K = C O U T 2 × 1 - ∆ C O U T 2 C O U T 2 × 1 - ∆ C O U T 2 + C O U T 3 × 1 - ∆ C O U T 3 - C O U T 2 C O U T 2 + C O U T 3 × Q G T o t a l × f S W + ∆ I C O M S I N K

The power loss of RLIM2 can be approximated as

Equation 17. P R L I M 2 = ( I S I N K × ( V C O M - V E E - 0.5 ) × R L I M 1 V C O M - V E E × R L I M 2 + ( V C O M - V E E - 0.5 ) × R L I M 1 ) 2 × R L I M 2
The maximum voltage rating of diode DLIM needs to consider the highest VVDD-to-VEE. The maximum current rating of DLIM can be chosen based on the derating from the worst-case continuous current, (VCOM-to-VEE – VF_DLIM) / RLIM2, where VF_DLIM is the forward voltage of DLIM. The diode package size is determined based on the power loss in forward conduction, PLoss_DLIM = VF_DLIM x ((VCOM-to-VEE – VF_DLIM) / RLIM2). A Schottky diode is recommended to reduce the power loss.