JAJSE28B
October 2017 – August 2018
UCC27710
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
4
概略回路図
標準的な伝播遅延の比較
5
改訂履歴
6
概要(続き)
7
Pin Configuration and Functions
Pin Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Thermal Information
8.5
Electrical Characteristics
8.6
Dynamic Electrical Characteristics
8.7
Typical Characteristics
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
VDD and Under Voltage Lockout
9.3.2
Input and Output Logic Table
9.3.3
Input Stage
9.3.4
Output Stage
9.3.5
Level Shift
9.3.6
Low Propagation Delays and Tightly Matched Outputs
9.3.7
Parasitic Diode Structure
9.4
Device Functional Modes
9.4.1
Minimum Input Pulse Operation
9.4.2
Output Interlock and Dead Time
9.4.3
Operation Under 100% Duty Cycle Condition
9.4.4
Operation Under Negative HS Voltage Condition
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Selecting HI and LI Low Pass Filter Components (RHI, RLI, CHI, CLI)
10.2.2.2
Selecting Bootstrap Capacitor (CBOOT)
10.2.2.3
Selecting VDD Bypass/Holdup Capacitor (CVDD) and Rbias
10.2.2.4
Selecting Bootstrap Resistor (RBOOT)
10.2.2.5
Selecting Gate Resistor RON/ROFF
10.2.2.6
Selecting Bootstrap Diode
10.2.2.7
Estimate the UCC27710 Power Losses (PUCC27710)
10.2.2.8
Estimating Junction Temperature
10.2.2.9
Operation With IGBT's
10.2.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
デバイスおよびドキュメントのサポート
13.1
ドキュメントのサポート
13.1.1
関連資料
13.2
関連リンク
13.3
コミュニティ・リソース
13.4
商標
13.5
静電気放電に関する注意事項
13.6
Glossary
14
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
サーマルパッド・メカニカル・データ
発注情報
jajse28b_oa
jajse28b_pm
8.7
Typical Characteristics
Figure 2.
Low-Side, Turn-On Propagation Delay vs Temperature
Figure 4.
High-Side, Turn-On Propagation Delay vs Temperature
Figure 6.
Turn-On Delay Matching vs Temperature
Figure 8.
High-Side Propagation Delay vs HS
Figure 10.
LO Fall Time with 1000-pF Load vs Temperature
Figure 12.
HO Fall Time with 1000-pF Load vs Temperature
Figure 14.
VHB-VHS UVLO Thresholds vs Temperature
Figure 16.
HI/LI Pin High Threshold vs Temperature
Figure 18.
HI/LI Pin Hysteresis vs Temperature
Figure 20.
HO Output Pull-Down Resistance vs Temperature
Figure 22.
HO Output Pull-Up Resistance vs Temperature
Figure 24.
Quiescent HB to HS Supply Current vs Temperature
Figure 26.
VDD and HB Operating Current with No Load vs Switching Frequency
Figure 28.
VDD and HB Operating Current with 4700-pF Load vs Switching Frequency
Figure 3.
Low-Side, Turn-Off Propagation Delay vs Temperature
Figure 5.
High-Side, Turn-Off Propagation Delay vs Temperature
Figure 7.
Turn-Off Delay Matching vs Temperature
Figure 9.
LO Rise Time with 1000-pF Load vs Temperature
Figure 11.
HO Rise Time with 1000-pF Load vs Temperature
Figure 13.
VDD UVLO Thresholds vs Temperature
Figure 15.
VDD and VHB-VHS UVLO Hysteresis vs Temperature
Figure 17.
HI/LI Pin Low Threshold vs Temperature
Figure 19.
LO Output Pull-Down Resistance vs Temperature
Figure 21.
LO Output Pull-Up Resistance vs Temperature
Figure 23.
Total Quiescent VDD plus HB Supply Current vs Temperature
Figure 25.
HB to COM Bootstrap Supply Leakage Current vs Temperature
Figure 27.
VDD and HB Operating Current with 1000-pF Load vs Switching Frequency