JAJSH44C April   2011  – March  2019

PRODUCTION DATA.

1. 特長
2. アプリケーション
3. 概要
4. 改訂履歴
5. Pin Configuration and Functions
6. Specifications
7. Detailed Description
1. 7.1 Overview
2. 7.2 Functional Block Diagram
3. 7.3 Feature Description
4. 7.4 Device Functional Modes
5. 7.5 Programming
8. Application and Implementation
1. 8.1 Application Information
2. 8.2 Typical Application
9. Power Supply Recommendations
10. 10Layout
11. 11デバイスおよびドキュメントのサポート
1. 11.1 ドキュメントのサポート
2. 11.2 コミュニティ・リソース
3. 11.3 商標
4. 11.4 静電気放電に関する注意事項
5. 11.5 Glossary
12. 12メカニカル、パッケージ、および注文情報

• RGC|64
• RGC|64

#### 7.4.14.2 PWM1-4

Pins 31, 32, 41, and 42 can be used as GPIs or PWM outputs.

If configured as PWM outputs, then limitations apply:

• PWM1 has a fixed frequency of 10 kHz
• PWM2 has a fixed frequency of 1 kHz
• PWM3 and PWM4 frequencies can be 0.93 Hz to 7.8125 MHz.

The frequency for PWM3 and PWM4 is derived by dividing down a 15.625MHz clock. To determine the actual frequency to which these PWMs can be set, must divide 15.625MHz by any integer between 2 and (224-1). The duty cycle resolution will be dependent on the set frequency for PWM3 and PWM4.

The PWM3 or PWM4 duty cycle resolution is dependent on the frequency set for the given PWM. Once the frequency is known the duty cycle resolution can be calculated as Equation 2.

Equation 2. Change per Step (%)PWM3/4 = frequency ÷ 15.625 × 106 × 100

To determine the closest frequency to 1MHz that PWM3 can be set to calculate as the following:

1. Divide 15.625MHz by 1MHz to obtain 15.625.
2. Round off 15.625 to obtain an integer of 16.
3. Divide 15.625MHz by 16 to obtain actual closest frequency of 976.563kHz.
4. Use Equation 2 to determine duty cycle resolution to obtain 6.25% duty cycle resolution.

All frequencies below 238Hz will have a duty cycle resolution of 0.0015%.