JAJSH44C April 2011 – March 2019 UCD90120A
Pins 31, 32, 41, and 42 can be used as GPIs or PWM outputs.
If configured as PWM outputs, then limitations apply:
The frequency for PWM3 and PWM4 is derived by dividing down a 15.625MHz clock. To determine the actual frequency to which these PWMs can be set, must divide 15.625MHz by any integer between 2 and (224-1). The duty cycle resolution will be dependent on the set frequency for PWM3 and PWM4.
The PWM3 or PWM4 duty cycle resolution is dependent on the frequency set for the given PWM. Once the frequency is known the duty cycle resolution can be calculated as Equation 2.
To determine the closest frequency to 1MHz that PWM3 can be set to calculate as the following:
All frequencies below 238Hz will have a duty cycle resolution of 0.0015%.