8.3.1 Input and Output Range

The VCA810’s 80 dB gain range allows the user to handle an exceptionally wide range of input signal levels. If the input and output voltage range specifications are exceeded, however, signal distortion and amplifier overdrive will occur. Figure 11 shows the maximum input and output voltage range. This chart plots input and output voltages versus gain in dB.

The maximum input voltage range is the largest at full attenuation (−40 dB) and decreases as the gain increases. Similarly, the maximum useful output voltage range increases as the input decreases. We can distinguish three overloading issues as a result of the operating mode: high attenuation, mid-range gain-attenuation, and high gain.

From –40 dB to –10 dB, gain overdriving the input stage is the only method to overdrive the VCA810. Preventing this type of overdrive is achieved by limiting the input voltage range.

From –10 dB to 40 dB, overdriving can be prevented by limiting the output voltage range. There are two limiting mechanisms operating in this situation. From –10 dB to 10 dB, an internal stage is the limiting factor; from 10 dB to 40 dB, the output stage is the limiting factor.

Output overdriving occurs when either the maximum output voltage swing or output current is exceeded. The VCA810 high output current of ±60 mA ensures that virtually all output overdrives will be limited by voltage swing rather than by current limiting. Table 1 summarizes these overdrive conditions.

8.3.2 Overdrive Recovery

As shown in Figure 11, the onset of overdrive occurs whenever the actual output begins to deviate from the ideal expected output. If possible, the user should operate the VCA810 within the linear regions shown in order to minimize signal distortion and overdrive delay time. However, instances of amplifier overdrive are quite common in automatic gain control (AGC) circuits, which involve the application of variable gain to input signals of varying levels. The VCA810 design incorporates circuitry that allows it to recover from most overdrive conditions in 200 ns or less. Overdrive recovery time is defined as the time required for the output to return from overdrive to linear operation, following the removal of either an input or gain-control overdrive signal. See Typical Characteristics for the overdrive plots for maximum gain and maximum attenuation.

8.3.3 Output Offset Error

Several elements contribute to the output offset voltage error; among them are the input offset voltage, the output offset voltage, the input bias current and the input offset current. To simplify the following analysis, the output offset voltage error is dependent only on the output-offset voltage of the VCA810 and the input offset voltage. The output offset error can then be expressed as Equation 3:

Equation 3.

where

• V_OS = Output offset error
• V_OSO = Output offset voltage
• G_dB = VCA810 gain in dB
• V_IOS = Input offset voltage

This is shown in Figure 29.

Figure 29. Output Offset Error versus Gain

Figure 18 shows the distribution for the output offset voltage at maximum gain.

8.3.4 Offset Adjustment

Where desired, the offset of the VCA810 can be removed as shown in Figure 30. This circuit simply presents a DC voltage to one of the amplifier inputs to counteract the offset error voltage. For best offset performance, the trim adjustment should be made with the amplifier set at the maximum gain of the intended application. The offset voltage of the VCA810 varies with gain as shown in Figure 29, limiting the complete offset cancellation to one selected gain. Selecting the maximum gain optimizes offset performance for higher gains where high amplification of the offset effects produces the greatest output offset. Two features minimize the offset control circuit noise contribution to the amplifier input circuit. First, making the resistance of R₂ a low value minimizes the noise directly introduced by the control circuit. This approach reduces both the thermal noise of the resistor and the noise produced by the resistor with the amplifier input noise current. A second noise reduction results from capacitive bypass of the potentiometer output. This reduction filters out power-supply noise that would otherwise couple to the amplifier input.

Figure 30. Optional Offset Adjustment

This filtering action diminishes as the wiper position approaches either end of the potentiometer, but practical conditions prevent such settings. Over its full adjustment range, the offset control circuit produces a ±5-mV input offset correction for the values shown. However, the VCA810 only requires one-tenth of this range for offset correction, assuring that the potentiometer wiper will always be near the potentiometer center. With this setting, the resistance seen at the wiper remains high, which stabilizes the filtering function.

8.3.5 Gain Control

The VCA810 gain is controlled by means of a unipolar negative voltage applied between ground and the gain control input, pin 3. If use of the output disable feature is required, a ground-referenced bipolar voltage is needed. Output disable occurs for 0.15 V ≤ V_C ≤ 2 V, and produces greater than 80 dB of attenuation. The control voltage should be limited to 2 V in disable mode, and –2.5 V in gain mode to prevent saturation of internal circuitry. The VCA810 gain-control input has a –3-dB bandwidth of 25 MHz and varies with frequency, as shown in Typical Characteristics. This wide bandwidth, although useful for many applications, can allow high-frequency noise to modulate the gain control input. In practice, this can be easily avoided by filtering the control input, as shown in Figure 31. R_P should be no greater than 100 Ω so as not to introduce gain errors by interacting with the gain control input bias current of 6 μA.

Figure 31. Control Line Filtering

8.3.6 Gain Control and Teeple Point

When the VCA810 control voltage reaches −1.5 V, also referred to as the Teeple point, the signal path undergoes major changes. From 0 V to the Teeple point, the gain is controlled by one bank of amplifiers: a low-gain VCA. As the Teeple point is passed, the signal path is switched to a higher gain VCA. This gain-stage switching can be seen most clearly in Figure 13. The output-referred voltage noise density increases proportionally to the control voltage and reaches a maximum value at the Teeple point. As the gain increases and the internal stages switch, the output-referred voltage noise density drops suddenly and restarts its proportional increase with the gain.

8.3.7 Noise Performance

The VCA810 offers 2.4-nV/√Hz input-referred voltage noise and 1.8-pA/√Hz input-referred current noise at a gain of 40 dB. The input-referred voltage noise, and the input-referred current noise terms, combine to give low output noise under a wide variety of operating conditions. Figure 32 shows the operational amplifier noise analysis model with all the noise terms included. In this model, all noise terms are taken to be noise voltage or current density terms in either nV/√Hz or pA/√Hz.

Figure 32. VCA810 Noise Analysis Model

The total output spot noise voltage can be computed as the square root of the sum of all squared output noise voltage contributors. Equation 4 shows the general form for the output noise voltage using the terms shown in Figure 32.

Equation 4.

Dividing this expression by the gain will give the equivalent input-referred spot-noise voltage at the noninverting input as shown by Equation 5.

Equation 5.

Evaluating these two equations for the VCA810 circuit and component values shown in Figure 34 (maximizing gain) will give a total output spot-noise voltage of 272.3 nV√Hz and a total equivalent input-referred spot-noise voltage of 2.72 nV√Hz. This total input-referred spot-noise voltage is higher than the 2.4-nV√Hz specification for the VCA810 alone. This reflects the noise added to the output by the input current noise times the input resistance R_S and R_T. Keeping input impedance low is required to maintain low total equivalent input-referred spot-noise voltage.

8.3.8 Input and ESD Protection

The VCA810 is built using a very high-speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices. These breakdowns are reflected in Absolute Maximum Ratings

All pins on the VCA810 are internally protected from ESD by means of a pair of back-to-back, reverse-biased diodes to either power supply, as shown in Figure 33. These diodes begin to conduct when the pin voltage exceeds either power supply by about 0.7 V. This situation can occur with loss of the amplifier power supplies while a signal source is still present. The diodes can typically withstand a continuous current of 30 mA without destruction. To ensure long-term reliability, however, diode current should be externally limited to 10 mA whenever possible.

Figure 33. Internal ESD Protection