11.1 Layout Guidelines

Achieving optimum performance with a high-frequency amplifier such as the VCA810 requires careful attention to board layout parasitic and external component types. Recommendations that will optimize performance include:

• Minimize parasitic capacitance to any AC ground for all of the signal I/O pins. This includes the ground pin (pin 2). Parasitic capacitance on the output can cause instability: on both the inverting input and the noninverting input, it can react with the source impedance to cause unintentional band limiting. To reduce unwanted capacitance, a window around the signal I/O pins should be opened in all of the ground and power planes around those pins. Otherwise, ground and power planes should be unbroken elsewhere on the board. Place a small series resistance (> 25 Ω) with the input pin connected to ground to help decouple package parasitic.
• Minimize the distance (less than 0.25” or 6.35 mm) from the power-supply pins to high-frequency 0.1-μF decoupling capacitors. At the device pins, the ground and power plane layout should not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections should always be decoupled with these capacitors. Larger (2.2 μF to 6.8 μF) decoupling capacitors, effective at lower frequencies, should also be used on the main supply pins. These capacitors may be placed somewhat farther from the device and may be shared among several devices in the same area of the PCB.
• Careful selection and placement of external components will preserve the high-frequency performance of the VCA810. Resistors should be a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal-film and carbon composition, axially-leaded resistors can also provide good high-frequency performance. Again, keep the leads and PCB trace length as short as possible. Never use wire-wound type resistors in a high-frequency application. Since the output pin is the most sensitive to parasitic capacitance, always position the series output resistor, if any, as close as possible to the output pin. Other network components, such as inverting or noninverting input termination resistors, should also be placed close to the package.
• Careful selection and placement of external components will preserve the high-frequency performance of the VCA810. Resistors should be a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal-film and carbon composition, axially-leaded resistors can also provide good high-frequency performance. Again, keep the leads and PCB trace length as short as possible. Never use wire-wound type resistors in a high-frequency application. Since the output pin is the most sensitive to parasitic capacitance, always position the series output resistor, if any, as close as possible to the output pin. Other network components, such as inverting or noninverting input termination resistors, should also be placed close to the package.
• Socketing a high-speed part like the VCA810 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network, which can make it almost impossible to achieve a smooth, stable frequency response. Best results are obtained by soldering the VCA810 onto the board.

11.2 Layout Example

Figure 49. Layout Example

11.2.1 Thermal Analysis

The VCA810 will not require heatsinking or airflow in most applications. Maximum desired junction temperature would set the maximum allowed internal power dissipation as described in this section. In no case should the maximum junction temperature be allowed to exceed 150°C.

Operating junction temperature (T_J) is given by Equation 12:

Equation 12.

The total internal power dissipation (P_D) is the sum of quiescent power (P_DQ) and additional power dissipated in the output stage (P_DL) to deliver load power. Quiescent power is simply the specified no-load supply current times the total supply voltage across the part. P_DL depends on the required output signal and load; for a grounded resistive load, however, it is at a maximum when the output is fixed at a voltage equal to one-half of either supply voltage (for equal bipolar supplies). Under this worst-case condition, P_DL = V_S.²/(4 ● R_L), where R_L is the resistive load.

Note that it is the power in the output stage and not in the load that determines internal power dissipation. As a worst-case example, compute the maximum T_J using an VCA810ID (SO-8 package) in the circuit of Figure 34 operating at maximum gain and at the maximum specified ambient temperature of 85°C.

Equation 13. P_D = 10 V(24.8 mA) + 5²/(4 × 500 Ω) = 260.5 mW

Equation 14. Maximum T_J = 85°C + (0.260 W ×125°C/W) = 117.6°C

This maximum operating junction temperature is well below most system level targets. Most applications will be lower since an absolute worst-case output stage power was assumed in this calculation of V_S/2 which is beyond the output voltage range for the VCA810.