SBAA507 March   2021 ADS8578S , ADS8584S , ADS8586S , ADS8588H , ADS8588S , ADS8598H , ADS8598S , ADS8661 , ADS8664 , ADS8665 , ADS8668 , ADS8671 , ADS8674 , ADS8675 , ADS8678 , ADS8681 , ADS8684 , ADS8684A , ADS8685 , ADS8688 , ADS8688A , ADS8688AT , ADS8689 , ADS8691 , ADS8694 , ADS8695 , ADS8698 , ADS8699 , OPA2990 , OPA4990 , OPA990

 

  1.   1
  2.   Design Description
  3.   Specifications
  4.   Design Notes
  5.   Component Selection
  6.   DC Transfer Characteristics
  7.   Simulation Verification for Floating Input
  8.   AC Transfer Characteristics
  9.   Noise Simulation
  10.   Stability Simulation
  11.   Design References
  12.   Design Featured Devices

Component Selection

  1. The normal input signal range (VG) is ±12.88V. VG is scaled down by the resistor divider (R3 and R4) to provide margin above the normal input voltage range for the floating input detection voltage. The following table lists the input range on the ADS8681 in this design, the input voltage range (VG), and the expected normal voltage (VIN) on the ADC input for 1-V margin.
    Input Signal Voltage (VG) ADS8681 Input Range (VADC) Expected Normal Voltage on ADC Input (VIN) Expected Voltage on ADC Input for Float (VIN_T)
    Maximum +12.88V +12.88V +11.88V +12.38V
    Minimum –12.88V –12.88V –11.88V +12.38V

    R3 is selected as 1kΩ for a small gain and offset error. Therefore, R4 is determined by the following equation:

    GUID-20210316-CA0I-ZXB0-R8G6-KVC2PSWBNWLM-low.gif
    GUID-20210316-CA0I-RZLK-XXWX-HCQMRNC1MQBD-low.gif

    A 12-kΩ and 0.1% tolerance resistor is finally selected for R4. The resistor value can be adjusted according to the noise and margin required in the system.

  2. The objective of this step is to select the ADC input voltage under which a float is detected (called VIN_T). This voltage is selected to be 0.5V higher than the highest normal operating input voltage (+11.88V) for margin to prevent a false detection of a float condition. Therefore, the VIN_T can be calculated from the equation:
    GUID-20210316-CA0I-GCFR-4XPQ-PRWF1BB6DTJP-low.gif
  3. The objective of this step is to select a voltage divider on the input of the amplifier (OPA990) that will set the float voltage at the input of the ADC as selected in step 2. VIN_T is the divided input down threshold voltage (VT) during a floating input condition. Use the following equations to calculate the required VT voltage to achieve the desired VIN_T:
    GUID-20210316-CA0I-8JGL-X6GW-JCBDSKQHBDFD-low.gif
    GUID-20210316-CA0I-7V36-4BKF-DPRQJLST1GVS-low.gif

    R1 and R2 are selected to create the VT voltage during floating inputs. To achieve higher input impedance, R2 is selected as 10MΩ. R1 is determined by the following equation:

    GUID-20210316-CA0I-WSN0-LTWH-B63NN9JM0RPW-low.gif
    GUID-20210316-CA0I-TQCJ-PLZT-X47MPZBK2V7X-low.gif

    R1 is selected as 1.2MΩ which is a standard resistor value. Note that the tolerance on these resistors only impacts the float voltage accuracy.

  4. The capacitor C1 in parallel with R3||R4 is used to filter the noise from the front-end circuit. The equation for the cutoff frequency based on the input resistors and capacitors follows. The exact value may not be critical so we use a standard value of 10nF in this design.
    GUID-20210316-CA0I-XXZF-HKSW-JKLHFBLRWQRT-low.gif