SBAU407 april   2023 ADS8354

 

  1.   Abstract
  2.   Trademarks
  3. 1Overview
    1. 1.1 ADS8354EVM-PDK Features
    2. 1.2 ADS8354EVM Features
    3. 1.3 Related Documentation From Texas Instruments
  4. 2Analog Interface
    1. 2.1 Connectors for Analog Inputs
    2. 2.2 ADC Input Signal Driver
      1. 2.2.1 Input Signal Path
  5. 3Digital Interfaces
    1. 3.1 SPI for the ADC Digital I/O
  6. 4Power Supplies
    1. 4.1 ADC Input Driver Configuration
    2. 4.2 ADC Voltage Reference Configuration
  7. 5ADS8354EVM-PDK Initial Setup
    1. 5.1 Default Jumper Settings
    2. 5.2 EVM Graphical User Interface Software Installation
  8. 6ADS8354EVM-PDK Operation
    1. 6.1 EVM GUI Global Settings for ADC Control
    2. 6.2 Time Domain Display Tool
    3. 6.3 Spectral Analysis Tool
    4. 6.4 Histogram Analysis Tool
  9. 7Bill of Materials, Printed-Circuit Board Layout, and Schematics
    1. 7.1 Bill of Materials
    2. 7.2 PCB Layout
    3. 7.3 Schematics

4 Power Supplies

AVDD operates from 4.5 V to 5.5 V. DVDD operates from 1.65 V to 5.5 V, independent of the AVDD supply. The analog portion of the ADS8354EVM operates from a 5-V supply (VA) generated using the TPS7A47-Q1 low-noise, low-dropout regulator. The same supply is used to power the positive supply of the THS4561 front-end driver amplifiers, and the negative –232-mV supply (AVSS) is generated using the LM7705 low-noise negative bias generator. AVSS can also be set to GND by shorting pins 2 and 3 of JP9.

The TPS7A47-Q1 regulator can be configured to generate a VA supply other than 5 V through programmable pin settings. For more information, see the Detailed Description section of the TPS7A47-Q1 device data sheet.

The digital portion of the ADC operates from a 3.3-DVDD supply from the PHI.