SCAU061
August 2025
1
Description
Get Started
Features
5
1
Evaluation Module Overview
1.1
Introduction
1.2
Kit Contents
1.3
Specification
1.4
Device Information
2
Hardware
2.1
CDCLVP111-SEP Clock Mux Selection
2.2
CDCLVP111-SEP EVM Input Biasing
2.3
CDCLVP111-SEP EVM Output Termination
2.4
Assembly Instructions
2.4.1
CDCLVP111-SEP Setup and Quick Test
2.4.1.1
Power Supply Setup
3
Hardware Design Files
3.1
CDCLVP111-SEP EVM Schematic
3.2
PCB Layouts
3.3
Bill of Materials (BOM)
Features
Distributes one of two differential input clocks to 10 differential LVPECL output clocks
Clock input selectable
Low output skew
Wide supply range