SCAU061 August   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 CDCLVP111-SEP Clock Mux Selection
    2. 2.2 CDCLVP111-SEP EVM Input Biasing
    3. 2.3 CDCLVP111-SEP EVM Output Termination
    4. 2.4 Assembly Instructions
      1. 2.4.1 CDCLVP111-SEP Setup and Quick Test
        1. 2.4.1.1 Power Supply Setup
  8. 3Hardware Design Files
    1. 3.1 CDCLVP111-SEP EVM Schematic
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)

PCB Layouts

CDCLVP111SEPEVM Top layerFigure 3-3 Top layer
CDCLVP111SEPEVM 2nd Layer - RF GNDFigure 3-4 2nd Layer - RF GND
CDCLVP111SEPEVM 3rd Layer - Heat Sink 1Figure 3-5 3rd Layer - Heat Sink 1
CDCLVP111SEPEVM 4th Layer - Heat Sink 2Figure 3-6 4th Layer - Heat Sink 2
CDCLVP111SEPEVM 5th Layer - Split Power SuppliesFigure 3-7 5th Layer - Split Power Supplies
CDCLVP111SEPEVM Bottom layerFigure 3-8 Bottom layer
Table 3-1 PCB Stack-up
LayerMaterialThickness (mil)εr
Top LayerCopper1.4-
DielectricFR464.2
RF GroundCopper1.4-
DielectricFR484.2
Heat Sink 1Copper1.4-
DielectricFR424.84.2
Heat Sink 2Copper1.4-
DielectricFR484.2
Split Power SuppliesCopper1.4-
DielectricFR41.44.2
Bottom LayerCopper1.4-