SCEA118 June   2022 AM623 , AM625 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442 , TXS0108E

 

  1.   1
  2. 1Translate Voltages for SPI
  3.   Design Considerations
  4.   Recommended Parts
  5. 2Translate Voltages for UART
  6.   Design Considerations
  7.   Recommended Parts
  8. 3Translate Voltages for I2C
  9.   Design Considerations
  10.   Recommended Parts
  11. 4Translate Voltages for GPIO
  12.   Design Considerations
  13.   Recommended Parts
  14. 5Translate Voltages for SDIO
  15.   Design Considerations
  16.   Recommended Parts
  17. 6Translate Voltages for RGMII
  18.   Design Considerations
  19.   Recommended Parts
  20. 7Translate Voltages for MDIO
  21.   Design Considerations
  22.   Recommended Parts
  23. 8Translate Voltages for a SIM Card
  24.   Design Considerations
  25.   25

Design Considerations

  • Translators enable communication when devices have mismatched logic voltage levels
  • Prevent damage to devices that cannot support higher voltage inputs
  • Use a fixed-direction translator for the clock (MDC) if higher speeds are required; some newer devices use a clock as high as 50 MHz
  • Open-drain compatible translators are required for the data line; although the protocol is not open-drain, pull-up resistors are required on the MDIO signal bus because there are times when the bus is not actively driven
  • See answers to our most frequently asked technical questions on [FAQ] Voltage Translators
  • Need additional assistance? Ask our engineers a question on the TI E2E™ Logic Support Forum