SLAU858B December   2023  – June 2025 AFE881H1

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
  6. 2Hardware
    1. 2.1 Hardware Description
      1. 2.1.1 Theory of Operation
      2. 2.1.2 Signal Definitions
    2. 2.2 Hardware Setup
      1. 2.2.1 Electrostatic Discharge Caution
      2. 2.2.2 Power Configuration and Jumper Settings
      3. 2.2.3 Connecting the Hardware
        1. 2.2.3.1 Power Configuration
        2. 2.2.3.2 External SPI and UART Controllers
  7. 3Software
    1. 3.1 Software Setup
    2. 3.2 Software Description
      1. 3.2.1 Starting the Software
      2. 3.2.2 Software Features
        1. 3.2.2.1 High Level Configuration Page
        2. 3.2.2.2 AFE881H1 Register Page
  8. 4Hardware Design Files
    1. 4.1 Board Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials
  9. 5Additional Information
    1. 5.1 Trademarks
  10. 6Related Documentation
  11. 7Revision History

2.2 Hardware Setup

This section describes the overall system setup for the EVM. A computer runs the AFE88xH1EVM-GUI and provides an interface to the AFE881H1EVM through the onboard FTDI controller. The USB connection provides 5V of power to the EVM. Low-dropout regulators (LDOs) generate the 3.3V and 1.8V supplies used for PVDD, IOVDD, and VDD for use as the supply voltage across the EVM board. Optional external PVDD, IOVDD, and VDD connections are available through banana jack terminals after the 3.3V and the 1.8V LDO supplies are disconnected. An external VDD connection is only needed if PVDD is 1.8V.