SLUAA32A October   2020  – September 2021 BQ769142 , BQ76922 , BQ76942 , BQ76952

 

  1.   Trademarks
  2. 1Production Programming of BQ769x2 Device Family
  3. 2Calibration
    1. 2.1 Calibration Accuracy
    2. 2.2 Cell Voltage Gain Calibration
      1. 2.2.1 Cell Voltage Gain Calibration Steps
    3. 2.3 Cell Voltage Offset Calibration
      1. 2.3.1 Cell Voltage Offset Calibration Steps
    4. 2.4 TOS (Top-of-Stack), PACK, and LD Pin Voltage Calibration
      1. 2.4.1 TOS / PACK / LD Voltage Calibration Steps
    5. 2.5 ADC Gain Calibration
    6. 2.6 Current Calibration
      1. 2.6.1 Board Offset Calibration Steps
      2. 2.6.2 CC Gain Calibration Steps
    7. 2.7 Temperature Calibration
      1. 2.7.1 Temperature Calibration Steps
    8. 2.8 COV and CUV Calibration
      1. 2.8.1 COV Calibration Steps
      2. 2.8.2 CUV Calibration Steps
    9. 2.9 Calibration Code Example
      1. 2.9.1 Code Example
      2. 2.9.2 Code Output
  4. 3OTP Programming
    1. 3.1 Recommended Steps for Writing OTP in Production
  5. 4References
  6. 5Revision History

2.6.1 Board Offset Calibration Steps

  1. Disable Sleep Mode (Subcommand 0x009A) to ensure voltage counts update quickly after applying a voltage.
  2. Apply a known current ICAL of 0 mA and ensure no current is flowing through the sense resistor connected between the SRP and SRN pins.
  3. After 100ms, read CC2 Counts using the READ_CAL1 subcommand 0xF081. While the CC2 Counts reading is four bytes, only the middle two bytes need to be read (16-bit value). For best accuracy, take multiple readings and calculate the average.
  4. Read the Coulomb Counter Offset Samples settings at RAM location 0x91C6. This parameter is defined as the number of counts of offset error that would accumulate over this many coulomb counter conversions. The default value is 64.
  5. Calculate the Board Offset:

    Equation 3.
    GUID-1BC52F0B-5E58-4BF9-BFAE-2533B37F5608-low.gif
  6. Write the new Board Offset value to RAM.
    • Enter CONFIG_UPDATE mode (Subcommand 0x0090).
    • Write Board Offset to 0x91C8.
    • Exit CONFIG_UPDATE mode (Subcommand 0x0092).
  7. Re-check the CC2 Counts reading. If the reading is not close to zero, repeat steps 1-5.