4 Charger With PG and or Host GPIO

If the charger has an open drain power good (PG) pin or the host has an available GPIO pin, turning on the external battery PFET, Q1, only requires a low cost NFET, Q2, like 2N7002. Alternatively, a host GPIO can be used or diode OR’d with /PG to also drive Q2’s gate.

Figure 4-1 Implementation Using Charger's PG Pin and or Host GPIO Pin

If the maximum SYS voltage [V(SYS)max] is higher than Q1’s maximum V_GS voltage (V_GSmax-Q1), the pull down resistor R_PD can be sized, using the equations below, to protect Q1. These resistors eliminate the need for a Zener diode clamp in case V(SYS)max is greater than V_GSmax-Q1.

Equation 2.

V_{G S (M A X) - Q 1} > \frac{R_{P U}}{R_{P U} + R_{P D}} \times V_{S Y S}

Equation 3.

{V_{P U} - 0.6 V - V}_{G S t h (M A X) - Q 2} > \frac{R_{P D}}{R_{P U} + R_{P D}} \times V_{S Y S}

If V(SYS)max is not higher then V_SGmax-Q1, R_PD can be zero ohms.