SLVA275C january 2010 – may 2023 UCD9081
The UnsequenceTime field in the configuration parameters specifies the amount of time that each rail must delay before unsequencing. The address map for these registers is as follows:
Address | Size | Default Value | Description |
---|---|---|---|
0xE150 | 2 | 0xC0FF | Unsequence delay for rail 1 |
0xE152 | 2 | 0xC1FF | Unsequence delay for rail 2 |
0xE154 | 2 | 0xC2FF | Unsequence delay for rail 3 |
0xE156 | 2 | 0xC3FF | Unsequence delay for rail 4 |
0xE158 | 2 | 0xC4FF | Unsequence delay for rail 5 |
0xE15A | 2 | 0xC5FF | Unsequence delay for rail 6 |
0xE15C | 2 | 0xC6FF | Unsequence delay for rail 7 |
0xE15E | 2 | 0xC7FF | Unsequence delay for rail 8 |
0xE160 | 2 | 0x0000 | Unsequence delay for GPO1 |
0xE162 | 2 | 0xC000 | Unsequence delay for GPO2 |
0xE164 | 2 | 0xC000 | Unsequence delay for GPO3 |
0xE166 | 2 | 0xC000 | Unsequence delay for GPO4 |
The contents of this register are as follows: