SLVU777A September   2012  – November 2021 TPS54020

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification Summary
    3. 1.3 Modifications
      1. 1.3.1 Output Voltage Setpoint
      2. 1.3.2 Slow-Start Time
      3. 1.3.3 Adjustable UVLO
      4. 1.3.4 Input Voltage Rails
  3. 2Test Setup and Results
    1. 2.1  Input / Output Connections
    2. 2.2  Efficiency
    3. 2.3  Output Voltage Load Regulation
    4. 2.4  Output Voltage Line Regulation
    5. 2.5  Load Transient
    6. 2.6  Control Loop Response
    7. 2.7  Output Voltage Ripple
    8. 2.8  Input Voltage Ripple
    9. 2.9  Start Up
    10. 2.10 Pre-Bias Start Up
    11. 2.11 Hiccup Mode Current Limit
  4. 3Board Layout
    1. 3.1 Layout
  5. 4Schematic and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
  6. 5Revision History

2.9 Start Up

Figure 2-8 and Figure 2-9 show the start-up waveforms for the EVM. In Figure 2-8, the output voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R6 and R11 resistor divider network. In Figure 2-9, the input voltage is initially applied and the output is inhibited by using a jumper at J5 to tie EN to GND. When the jumper is removed, EN is released. When the EN voltage reaches the enable threshold voltage, the start-up sequence begins and the output voltage ramps up to the externally set value of 1.8 V. The input voltage for these plots is 12 V and the load is 10-A resistive load.

GUID-C0F5AAF6-AA25-4523-85A1-DD173B1822E6-low.gifFigure 2-8 TPS54020EVM-082 Start Up with VIN
GUID-CA45B82A-CE85-408F-AAD6-C3AC26D41320-low.gifFigure 2-9 TPS54020EVM-082 Start Up with EN