SLVUCB3 March   2022

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Related Documentation
  3. 2Schematics, Bill of Materials, and Layout
    1. 2.1 TPS3760EVM Schematic
    2. 2.2 TPS3760EVM Bill of Materials
    3. 2.3 Layout and Component Placement
  4. 3EVM Connectors
    1. 3.1 EVM Test Points
    2. 3.2 EVM Jumpers
  5. 4EVM Setup and Operation
    1. 4.1 Input Power (VDD)
    2. 4.2 SENSE1/SENSE2 Inputs
    3. 4.3 RESET1/RESET2 Outputs
    4. 4.4 Capacitor Time Delay Reset/MR
    5. 4.5 Capacitor Time Delay Sense/MR

2.3 Layout and Component Placement

Figure 2-2 and Figure 2-3 are the top overlay and bottom overlay of the printed circuit board (PCB) and shows the component placement on the EVM. Figure 2-4 shows the top layout, Figure 2-5 and Figure 2-6 show the top and bottom layers, and Figure 2-7 and Figure 2-8 show the top and bottom solder masks of the EVM.

Figure 2-2 Component Placement - Top Overlay
Figure 2-3 Component Placement - Bottom Overlay
Figure 2-4 Layout - Top
Figure 2-5 Top Layer
Figure 2-6 Bottom Layer
Figure 2-7 Top Solder Mask
Figure 2-8 Bottom Solder Mask