SLVUCG5 January   2023 TPS7H1111-SP

PRODUCTION DATA  

  1.   TPS7H1111EVM-CVAL
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Related Information
    2. 1.2 Features
    3. 1.3 Applications
  4. 2Setup
    1. 2.1 Input/Output Connectors and Jumper Descriptions
      1. 2.1.1 Jumpers
      2. 2.1.2 Test Points
    2. 2.2 Equipment Setup
  5. 3Operation
  6. 4Adjustable Operation
  7. 5Test Results
    1. 5.1 Enable and Soft Start Timing
    2. 5.2 PSRR
    3. 5.3 Stability
    4. 5.4 Noise Spectral Density
  8. 6Board Layout
  9. 7Schematic
  10. 8Bill of Materials

4 Adjustable Operation

The nominal output voltage for the TPS7H1111-SP is configured using equation VSS_SET = VOUT = ISET x RSET. Therefore, RSET = VSS_SET / ISET = 1.8 V / 100 μA = 18 kΩ. ISET is determined by RREF, and is designed to be 100 uA using a precision 12 kΩ resistor. See Figure 4-1 for block diagram. See Figure 7-1 for RSET (R8), and RREF (R9) connectivity. See SLVSFT8 for more detailed information.

GUID-20201112-CA0I-HBJS-0TSG-NVTMWNWSJKQ7-low.png Figure 4-1 Simplified Schematic to Configure Output Voltage

It is also important to note that the TPS7H1111-SP utilizes an adjustable power good PG output threshold FB_PG. When changing the output voltage, a suitable voltage divider needs to be set on the FB_PG pin in order for the LDO to assert PG when appropriate threshold achieved. Additionally when PG is asserted, this turns off internal fast charge circuit that is part of the soft start. Thus, setting appropriate divider is important for proper startup. See SLVSFT8 for more detailed information.