SLWU087E november   2013  – june 2023

 

  1.   1
  2.   High Speed Data Converter Pro GUI
  3.   Trademarks
  4. 1 Introduction
  5. 2 Software Start up
    1. 2.1 Installation Instructions
    2. 2.2 USB Interface and Drivers
    3. 2.3 Device ini Files
  6. 3 User Interface
    1. 3.1 Toolbar
      1. 3.1.1 File Options
        1. 3.1.1.1 User Profiles
        2. 3.1.1.2 Resize Window
      2. 3.1.2 Instrument Options
        1. 3.1.2.1 TSW14J56 and High Speed Data Converter (HSDC) Pro Eye Quality Analysis
        2. 3.1.2.2 IO Delay
        3. 3.1.2.3 JESD204B Error Injection
        4. 3.1.2.4 FPGA Registers Write Read
      3. 3.1.3 Data Capture Option
        1. 3.1.3.1 Capture Option
        2. 3.1.3.2 Trigger Option
        3. 3.1.3.3 Using Multiple TSW14xxx and ADC EVM’s for Simultaneous Capture using Trigger Option
          1. 3.1.3.3.1 Hardware Setup
          2. 3.1.3.3.2 Setting up the Slave Board
          3. 3.1.3.3.3 Setting up the Master Board
          4. 3.1.3.3.4 Read Captured Memory from the Slave Board
      4. 3.1.4 Test Options
        1. 3.1.4.1  Notch Frequency Bins
        2. 3.1.4.2  2 Channel Display and Cursor Lock
        3. 3.1.4.3  Analysis Window Markers
        4. 3.1.4.4  X-Scale in Time
        5. 3.1.4.5  Y-Scale in Voltage
        6. 3.1.4.6  Other Frequency Options
        7. 3.1.4.7  NSD Marker
        8. 3.1.4.8  Phase Plot
        9. 3.1.4.9  Phase in Degree
        10. 3.1.4.10 Histogram
        11. 3.1.4.11 Disable User Popups
        12. 3.1.4.12 HSDC Pro Lite Version
      5. 3.1.5 Help
    2. 3.2 Status Windows
    3. 3.3 Mode Selection
    4. 3.4 Device Selection
    5. 3.5 Skip Configuration
    6. 3.6 Capture Button (ADC Mode Only)
    7. 3.7 Test Selection (ADC Mode only)
      1. 3.7.1 Single Tone FFT
        1. 3.7.1.1 Parameter Controls
        2. 3.7.1.2 ADC Captured Data Display Pane
        3. 3.7.1.3 FFT Power Spectrum
        4. 3.7.1.4 Overlay Unwrap Waveform
        5. 3.7.1.5 Single Tone FFT Statistics
      2. 3.7.2 Multi Channel Display
      3. 3.7.3 Unit Selection
      4. 3.7.4 Time Domain
      5. 3.7.5 Two Tone
      6. 3.7.6 Channel Power
    8. 3.8 DAC Display Panel (DAC Mode only)
      1. 3.8.1 Send Button (DAC Mode Only)
      2. 3.8.2 Load File to Transfer into TSW14xxx Button
      3. 3.8.3 Parameter Controls
    9. 3.9 I/Q Multi-Tone Generator
  7. 4 ADC Data Capture Software Operation
    1. 4.1 Testing a TSW1400 EVM with an ADS5281 EVM
    2. 4.2 Testing a TSW1400EVM with an ADS62P49EVM (CMOS Interface)
  8. 5 TSW1400 Pattern Generator Operation
    1. 5.1 Testing a TSW1400 EVM with a DAC3152 EVM
    2. 5.2 Loading DAC Firmware
    3. 5.3 Configuring TSW1400 for Pattern Generation
    4. 5.4 Testing a TSW1400 EVM with a DAC5688EVM (CMOS Interface)
  9. 6 TSW14J58 Functional Description
    1. 6.1 Testing the TSW14J58 EVM with an ADC12DJ3200 EVM
  10. 7 TSW14J57 Functional Description
    1. 7.1 Testing the TSW14J57 EVM with an ADC34J45 EVM
  11. 8 TSW14J56 Functional Description
    1. 8.1 Testing the TSW14J56 EVM with an ADC34J45 EVM
  12. 9 TSW14J50 Functional Description
    1. 9.1 Device Selection
  13. 10TSW14J10 Functional Description
    1. 10.1 DAC and ADC GUI Configuration File Changes When Using a Xilinx Development Platform
    2. 10.2 DAC38J84EVM GUI Setup Example
  14.   A Signal Processing in High Speed Data Converter Pro
    1.     A.1 Introduction
    2.     A.2 FFT Calculation from Time Domain Data
      1.      A.2.1 FFT Window Correction Factor
    3.     A.3 FFT Filtering
    4.     A.4 Single Tone Parameters
      1.      A.4.1 Number of Neighboring Bins for each FFT Window
    5.     A.5 Fundamental Power
      1.      A.5.1 Harmonic Distortions
      2.      A.5.2 SNR
      3.      A.5.3 SFDR
      4.      A.5.4 THD
      5.      A.5.5 SINAD
      6.      A.5.6 ENOB
      7.      A.5.7 Next Spur
    6.     A.6 Two Tone Parameters
    7.     A.7 Average FFT Calculation
    8.     A.8 NSD Calculation
  15.   B History Notes
  16.   C Revision History

4.2 Testing a TSW1400EVM with an ADS62P49EVM (CMOS Interface)

This section describes the operation when testing with an ADS62P49 EVM that is configured for CMOS output interface.

  • Power down the TSW1400 if an ADC EVM is not installed.
  • Connect J1 and J2 of the ADS62P49 EVM to connector J1 of the TSW1400 EVM.

Note: Pin 1 of the TSW1400 connector plugs into pin 39 of J1 on the ADS62P49 EVM.
  • Provide unpowered +5 VDC connections to J10 and return to J12 of the ADS62P49 EVM.
  • Provide a 1.5 VPP 40-MHz sine-wave clock to J19 of the ADS62P49 EVM. Make sure this clock is within the frequency limits specified in the data sheet when operating in CMOS mode.
  • Provide a filtered 10-MHz analog input to CH1 (J6).
  • Power up the TSW1400 followed by the ADC EVM.
  • Setup the ADS62P49 EVM to operate in parallel mode, offset binary parallel CMOS output, and internal reference.
  • Start up the HSDC Pro GUI as described in the Software Start Up section.
  • The TSW1400 EVM connected to the CMOS connectors of the ADS62P49 EVM is shown in Figure 4-4.
GUID-78D475D0-90E0-45BE-AE37-613F0277CEC5-low.pngFigure 4-4 TSW1400EVM interfacing to the CMOS connectors of an ADS62P49EVM

To setup the GUI to run in the data capture mode, click on the “ADC” tab in the top left side of the GUI. Navigate to the device selection button located in the upper left side of the GUI, click on the drop down arrow, then select “ADS62p49_cmos”. After clicking on this file, a pop-up opens asking “Do you want to update the Firmware for ADC”. Click on “Yes”. The firmware starts loading which takes approximately 20 seconds to complete. After the firmware load has completed, the FPGA_CONF_DONE LED turns on after the FPGA is configured. The LEDs labeled USER_LED (0–7) should now all be on.

Note: If the TSW1400 is not receiving a valid clock from the ADC EVM, USER_LED3 and USER_LED4 is off.
  • Use the “Test Selection” button to change the capture display to Single Tone.
  • Set the active channel setting to Channel 1/2.
  • Use the default Record Length value of 65,536.
  • Set the ADC Sampling Rate to 40 MHz.
  • Click on the Auto Calculation of Coherent Frequency function and Rectangular capture mode if using a coherent input frequency. Otherwise, do not set this and use "Blackman" windowing mode.
  • Set the input frequency source to the new value in ADC Input Target Frequency that is generated by the Auto Calculation of Coherent Frequency function.
  • Make sure the display mode is set to “Frequency”.
  • Click on the “Capture” button to perform a data capture. The results should like similar to those shown in Figure 4-5.
GUID-1B9F3784-07C9-46AD-BF8F-BDCB1B37866C-low.gifFigure 4-5 TSW1400EVM Captured Results from ADS62P49EVM