SNLU223D August   2017  – February 2023 DS90UB954-Q1

 

  1.   DS90UB954-Q1EVM Deserializer User's Guide
  2. 1 Trademarks
  3. 2 Introduction
  4. 3 Quick Start Guide
    1. 3.1 System Requirements
      1. 3.1.1 Included Components
      2. 3.1.2 Additional Required Components
    2. 3.2 Applications Diagram
    3. 3.3 Major Components of DS90UB954-Q1EVM
    4. 3.4 DS90UB954-Q1EVM Setup
  5. 4 DS90UB954-Q1EVM Board Configuration
    1. 4.1 Default Configuration
    2. 4.2 Power Supply
    3. 4.3 Power-over-Coax Interface
    4. 4.4 MIPI CSI-2 Output Signals
    5. 4.5 FPD-Link III Signals
    6. 4.6 I2C Interface
    7. 4.7 Control Interface
  6. 5 Enable and Reset
  7. 6 Use with DS90UB936-Q1
  8. 7 Typical Connection and Test Equipment
  9. 8 Termination Device
  10. 9 Typical Test Setup
  11. 10Equipment References
  12. 11Cable References
  13. 12Software for DS90UB954Q1-EVM Evaluation - Analog LaunchPAD (ALP) Software Setup
    1. 12.1 System Requirements
    2. 12.2 Download Contents
    3. 12.3 Installation of the ALP Software
    4. 12.4 Startup - First Launch
  14. 13Using ALP and DS90UB954 Profile
    1. 13.1 Information Tab
    2. 13.2 Registers Tab
    3. 13.3 Registers Tab - Address 0x00 Expanded
      1. 13.3.1 Port Specific Registers
      2. 13.3.2 36
    4. 13.4 Saving and Loading Register Settings
    5. 13.5 Scripting Tab
      1. 13.5.1 Example Functions
        1. 13.5.1.1 Local I2C Reads/Writes
        2. 13.5.1.2 General I2C Reads/Writes:
        3. 13.5.1.3 I2C Reads/Writes with Multi-Byte Register Addresses
    6. 13.6 GPIO Tab
    7. 13.7 Forwarding Tab
    8. 13.8 CSI Registers Tab
    9. 13.9 Remote Registers Tab
  15. 14Troubleshooting ALP Software
    1. 14.1 ALP Does Not Detect The EVM
    2. 14.2 USB2ANY Firmware Issues
  16. 15DS90UB954-Q1EVM PCB Schematics, Layout and Bill of Materials - DS90UB954-Q1EVM Schematic
  17. 16DS90UB954-Q1 EVM PCB Layout
  18. 17DS90UB954-Q1EVM Bill of Materials
  19. 18Revision History

5 Enable and Reset

The DS90UB954-Q1 is enabled and reset by controlling the PDB input level. PDB has an internal pull down, and should remain low until all supplies are stable. There are three device enable and reset/power-down options for the EVM.

  • RC timing option: The RC delay created with C123 and R131 connected to the PDB pin is the default option for delaying PDB on the EVM. This is used for simplicity of debugging and using the device. TI recommends using a GPIO signal from a host process or to drive PDB after all rails have settled in customer designs.
  • External control option: A momentary push-button switch, SW1, is available for manually driving the PDB signal low while the button is held.
  • Software control option: The PDB pin is also made available in the J24 and J26 CSI-2 output connectors, allowing a host processor to control the PDB pin.