SNOAA35D April 2023 – December 2023 LM2901 , LM2901B , LM2901B-Q1 , LM2903 , LM2903-Q1 , LM2903B , LM2903B-Q1 , LM339 , LM339-N , LM393 , LM393-N , LM393B , LM397 , TL331 , TL331-Q1 , TL331B
If both inputs exceed the upper input voltage range (Vin > Vcc - 1.5V), both I1 and I2 are cut off, so Q7 remains off, which allows the base of Q8 to be pulled-up and saturate, pulling the output low.
For the classic devices, when the inputs exceed the upper input range, the output goes Low. Because of the Section 3.2 in the B devices, adding an inversion, the B devices output will go high.
Because the inputs have no internal clamp or ESD diodes to VCC, the input voltage can go up to a maximum of 36 V. If the inputs exceed about VCC-1V, the input will block current flow due to the reverse biased base-emitter junctions in the input PNP transistors and associated blocking diodes D2 or D4. Current flow is blocked even if VCC equals 0 V. If either input or both inputs exceed the maximum 36 V VCC rating, junction breakdown can occur. This can lead to permanent device damage per the table notes in the respective device's data sheet Absolute Maximum Ratings table.
If either input is lower than –0.3 V with respect to the negative supply, excessive input current can flow in the substrate and the output can display phase reversal, also called inversion. See the Negative Input Voltages in the following section for further information.