4 Operation Notes

To operate the EVM, apply a valid input voltage from 4.5 V to 15 V. The output voltage can be set over the range from 0.5 V to 2.0 V.

The Power-Good (PGOOD) indicator of the EVM will assert high when the output voltage is within ±5% of the programmed output voltage value. A 10-kΩ pullup resistor (R18) is populated between the PGOOD pin and the 3V3 pin.

The TPSM846C24DEVM-007 is set-up to operate at 500 kHz. A clock circuit is present on the bottom of the EVM. The clock circuit produces a 500 kHz, 50% duty cycle clock that feeds both devices. If another switching frequency is required, R20 must be removed from the clock circuit on the bottom of the EVM and an external clock must be connected to the EXT CLK test point. The external clock applied to EXT CLK test point must be 2 × the required frequency. The device can be synchronized to an external clock over the frequency range of 300 kHz to 1 MHz. Refer to the TPSM846C24 4.5-V to 15-V Input, 0.5-V to 2.0-V Output, 35-A Power Module Data Sheet for further information on synchronization.

The TPSM846C24DEVM-007 includes both input and output capacitors. The EVM includes footprints for adding additional input and output capacitors to the EVM. Adding additional capacitance will improve transient response. The actual capacitance required will depend on the input and output voltage conditions of the particular application, along with the desired transient response. Refer to the product data sheet for further information on input and output capacitance and transient response.