SNVU792 September   2021 LM5152-Q1

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Applications
    2. 1.2 Features
  3. 2EVM Setup
    1. 2.1 EVM Characteristics
    2. 2.2 EVM Connectors and Test Points
  4. 3Test Setup and Procedures
    1. 3.1 Equipment
  5. 4Test Results
    1. 4.1 Efficiency
    2. 4.2 Loop Response
    3. 4.3 Thermal Performance
    4. 4.4 Typical Waveforms
  6. 5PCB Layers
  7. 6Schematic
  8. 7Bill of Materials

2.2 EVM Connectors and Test Points

Section 2 describes the connection points of the evaluation module. Table 2-2 to Table 2-4 describe these connections. Table 2-2 lists the power connections of the evaluation module. These connections are intended to handle relatively large currents.

Table 2-2 Power Connections
JUMPERPINDESCRIPTION
J1VIN+Positive input voltage power for the evaluation module
J2VOUT+Positive output voltage power for the evaluation module
J4GNDNegative output voltage power for the evaluation module
J5VIN–Negative input voltage power for the evaluation module

Table 2-3 lists the EVM jumpers and test points that configure the LM5152-Q1 as desired. These jumpers can set different modes of operation or provide signals to different pins of the LM5152-Q1.

Table 2-3 Programmable Jumper Connections
JUMPERPINSDESCRIPTIONDEFAULT CONNECTION
J7Pin 1 to Pin 2SYNC/DITHER/VH/CP is pulled to VCC through a 1-kΩ resistor to enable the internal charge pump or enable the VCC holdup functionality. This connection must not be made if the J10 is populated.
Pin 2 to Pin 3SYNC/DITHER/VH/CP is pulled to AGND through a 1-kΩ resistor to disable the internal charge-pump and VCC holdup functionality.
OpenIf an external clock synchronization on J10 is used, leave this jumper open. X
J9VTRK_DPWM signal applied through a two stage low-pass filters to the TRK pin. R17 must be populated.
J10Pin 1 to Pin 2SYNC/DITHER/VH/CP pulled to ground, disabling dithering, internal charge-pump functionality, and VCC holdup functionality. J10 must not be populated when J7 is populated between pin 1 and pin 2.X
OpenDithering is enabled. To synchronize to an external clock, remove C37.
J11Pin 1 to Pin 2Bypass D1 to tie either VIN or VOUT nets to the BIAS pin.X
OpenEither VIN or VOUT is supplied through D1 to the BIAS pin.
J12Pin 1 to Pin 2VIN is supplied to the BIAS pin. This is the default connection.X
Pin 2 to Pin 3VOUT is supplied to the BIAS pin.
J13Pin 1 to Pin 2Connect an auxiliary power supply that can be used to supply power to the BIAS pin. J11 must be open if this is populated.
Pin 2 to Pin 3Connect VCC to BIAS.
OpenX
J14Pin 1 to Pin 2Configures light-load switching operation to be FPWMX
Pin 2 to Pin 3Configures light-load switching operation to be diode emulation
OpenConfigures light-load switching operation to be skip
TP6Positive input to the VAUX net
TP7Negative input to the VAUX net
TP8Positive input to the TRK pin
TP9Negative input to the TRK pin

Table 2-4 indicates the dedicated voltage probe points of the EVM. These points are used to make measurements on the EVM.

Table 2-4 Probe Points
SENSE POINTNAMEDESCRIPTION
TP1VIN+Sense point for the positive input voltage
TP2VOUT+Sense point for the positive output voltage
TP3SWSense point for the switch node of the boost controller
TP4GNDSense point for the negative output voltage
TP5VIN–Sense point for the negative input voltage
J3PGNDPower ground connection
J6PGNDPower ground connection
J81BIAS
2VCC
3STATUS
4UVLO
5COMP
6SS
7AGND